| Message ID | 20250210212931.62401-1-philmd@linaro.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | disas: Have CPUClass::disas_set_info() callback set the endianness | expand |
On 10/2/25 22:29, Philippe Mathieu-Daudé wrote: > Philippe Mathieu-Daudé (10): > target: Set disassemble_info::endian value for little-endian targets > target: Set disassemble_info::endian value for big-endian targets > target/arm: Set disassemble_info::endian value in disas_set_info() > target/microblaze: Set disassemble_info::endian value in > disas_set_info > target/mips: Set disassemble_info::endian value in disas_set_info() > target/ppc: Set disassemble_info::endian value in disas_set_info() > target/riscv: Set disassemble_info::endian value in disas_set_info() > target/sh4: Set disassemble_info::endian value in disas_set_info() > target/xtensa: Set disassemble_info::endian value in disas_set_info() > disas: Remove target_words_bigendian() call in > initialize_debug_target() Series queued with rth's comments addressed, thanks!
On 6/3/25 14:58, Philippe Mathieu-Daudé wrote: > On 10/2/25 22:29, Philippe Mathieu-Daudé wrote: > >> Philippe Mathieu-Daudé (10): >> target: Set disassemble_info::endian value for little-endian targets >> target: Set disassemble_info::endian value for big-endian targets >> target/arm: Set disassemble_info::endian value in disas_set_info() >> target/microblaze: Set disassemble_info::endian value in >> disas_set_info >> target/mips: Set disassemble_info::endian value in disas_set_info() >> target/ppc: Set disassemble_info::endian value in disas_set_info() >> target/riscv: Set disassemble_info::endian value in disas_set_info() >> target/sh4: Set disassemble_info::endian value in disas_set_info() >> target/xtensa: Set disassemble_info::endian value in disas_set_info() >> disas: Remove target_words_bigendian() call in >> initialize_debug_target() > > Series queued with rth's comments addressed, thanks! Oops I meant to reply this on v3: https://lore.kernel.org/qemu-devel/20250210221830.69129-1-philmd@linaro.org/
Missing review: patch #3 Since v1: - Addressed Thomas & Richard comments Targets are aware of their endianness. No need for a global target_words_bigendian() call in disas/ where we call the CPUClass::disas_set_info() handler which already update disassemble_info fields. Specify the target endianness in each CPUClass handler. Philippe Mathieu-Daudé (10): target: Set disassemble_info::endian value for little-endian targets target: Set disassemble_info::endian value for big-endian targets target/arm: Set disassemble_info::endian value in disas_set_info() target/microblaze: Set disassemble_info::endian value in disas_set_info target/mips: Set disassemble_info::endian value in disas_set_info() target/ppc: Set disassemble_info::endian value in disas_set_info() target/riscv: Set disassemble_info::endian value in disas_set_info() target/sh4: Set disassemble_info::endian value in disas_set_info() target/xtensa: Set disassemble_info::endian value in disas_set_info() disas: Remove target_words_bigendian() call in initialize_debug_target() disas/disas-common.c | 13 ++++--------- target/alpha/cpu.c | 1 + target/arm/cpu.c | 10 +++------- target/avr/cpu.c | 1 + target/hexagon/cpu.c | 1 + target/hppa/cpu.c | 1 + target/i386/cpu.c | 1 + target/loongarch/cpu.c | 1 + target/m68k/cpu.c | 1 + target/microblaze/cpu.c | 1 + target/mips/cpu.c | 3 +++ target/openrisc/cpu.c | 1 + target/ppc/cpu_init.c | 2 ++ target/riscv/cpu.c | 9 +++++++++ target/rx/cpu.c | 1 + target/s390x/cpu.c | 1 + target/sh4/cpu.c | 5 +++++ target/sparc/cpu.c | 1 + target/tricore/cpu.c | 6 ++++++ target/xtensa/cpu.c | 5 +++++ 20 files changed, 49 insertions(+), 16 deletions(-)