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[0/9] target/microblaze: Always use TARGET_LONG_BITS == 32

Message ID 20250212220155.1147144-1-richard.henderson@linaro.org (mailing list archive)
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Series target/microblaze: Always use TARGET_LONG_BITS == 32 | expand

Message

Richard Henderson Feb. 12, 2025, 10:01 p.m. UTC
Use out-of-line helpers to implement extended address memory ops.
With this, we can reduce TARGET_LONG_BITS to the more natural 32
for this 32-bit cpu.


r~


Richard Henderson (9):
  target/microblaze: Split out mb_unaligned_access_internal
  target/microblaze: Split out mb_transaction_failed_internal
  target/microblaze: Implement extended address load/store out of line
  target/microblaze: Use uint64_t for CPUMBState.ear
  target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea
  target/microblaze: Fix printf format in mmu_translate
  target/microblaze: Use TARGET_LONG_BITS == 32 for system mode
  target/microblaze: Drop DisasContext.r0
  target/microblaze: Simplify compute_ldst_addr_type{a,b}

 target/microblaze/cpu.h                  |   5 +-
 target/microblaze/helper.h               |  16 ++-
 target/microblaze/helper.c               |  25 ++--
 target/microblaze/mmu.c                  |   3 +-
 target/microblaze/op_helper.c            | 157 +++++++++++++++++++----
 target/microblaze/translate.c            | 118 +++++++++--------
 configs/targets/microblaze-softmmu.mak   |   4 +-
 configs/targets/microblazeel-softmmu.mak |   4 +-
 8 files changed, 228 insertions(+), 104 deletions(-)

Comments

Philippe Mathieu-Daudé Feb. 13, 2025, 12:37 p.m. UTC | #1
+AMD folks

On 12/2/25 23:01, Richard Henderson wrote:
> Use out-of-line helpers to implement extended address memory ops.
> With this, we can reduce TARGET_LONG_BITS to the more natural 32
> for this 32-bit cpu.

I thought about something similar 2 months ago, but then realized
MicroBlaze cores can be synthetized in 64-bit, and IIRC there is
not much missing (I'd say effort would be to add 20% more of what
we currently have). Just wanted to mention before taking the
decision to restrict to 32-bit. OTOH if there are no plan for
adding 64-bit support at AMD, then I'm more than happy to simplify
by considering only 32-bit.

> Richard Henderson (9):
>    target/microblaze: Split out mb_unaligned_access_internal
>    target/microblaze: Split out mb_transaction_failed_internal
>    target/microblaze: Implement extended address load/store out of line
>    target/microblaze: Use uint64_t for CPUMBState.ear
>    target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea
>    target/microblaze: Fix printf format in mmu_translate
>    target/microblaze: Use TARGET_LONG_BITS == 32 for system mode
>    target/microblaze: Drop DisasContext.r0
>    target/microblaze: Simplify compute_ldst_addr_type{a,b}