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Tue, 25 Mar 2025 11:23:22 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D163F20043; Tue, 25 Mar 2025 11:23:20 +0000 (GMT) Received: from li-3c92a0cc-27cf-11b2-a85c-b804d9ca68fa.ibm.com (unknown [9.124.216.239]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 25 Mar 2025 11:23:20 +0000 (GMT) From: Aditya Gupta To: Mahesh J Salgaonkar , Madhavan Srinivasan , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , =?utf-8?b?RnLDqWTDqXJp?= =?utf-8?b?YyBCYXJyYXQ=?= Cc: , Subject: [PATCH v6 00/10] Power11 support for QEMU [PowerNV] Date: Tue, 25 Mar 2025 16:53:09 +0530 Message-ID: <20250325112319.927190-1-adityag@linux.ibm.com> X-Mailer: git-send-email 2.49.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: dYZgCrbfnu5SBkeuFWm4rvdszEj6JoRO X-Proofpoint-ORIG-GUID: EZrKgYFzVbWCQF59tjkfabBRpHYIHJud X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-25_04,2025-03-25_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 malwarescore=0 mlxscore=0 impostorscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 adultscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503250076 Received-SPF: pass client-ip=148.163.156.1; envelope-from=adityag@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Overview ============ Add support for Power11 powernv machine type. As Power11 core is same as Power10, hence much of the code has been reused from Power10. Split Powernv11 chip/machine code into commits introducing: chip,machine,xive,phb This is to try to keep the code smaller in each commit, but can squash the xive/phb commits into respective chip/machine commit Power11 PSeries already added in QEMU in: commit 273db89bcaf4 ("ppc/pseries: Add Power11 cpu type") Git Tree for Testing ==================== QEMU: https://github.com/adi-g15-ibm/qemu/tree/p11-powernv-v6 Has been tested with following cases: * '-M powernv' / '-M powernv10' / '-M powernv11' * '-smp' option tested skiboot with Power11 support: https://github.com/open-power/skiboot, since commit 785a5e3 Linux with Power11 support: https://github.com/torvalds/linux, since v6.9-rc1 Note: Functional test not added now, will add as soon as op-build releases new kernel image with Power11 support Changelog ========= v6: + make Pnv11Chip's parent as PnvChip, instead of Pnv10Chip + rebase on upstream/master v5 (https://lore.kernel.org/qemu-devel/57ce8d50-db92-44f0-96a9-e1297eea949f@kaod.org/): + add chiptod + add instance_init for P11 to use P11 models + move patch introducing Pnv11Chip to the last + update skiboot.lid to skiboot's upstream/master v4: + patch #5: fix memory leak in pnv_chip_power10_quad_realize - no change in other patches v3: + patch #1: version power11 as power11_v2.0 + patch #2: split target hw/pseries code into patch #2 + patch #3,#4: fix regression due to Power10 and Power11 having same PCR + patch #5: create pnv_chip_power11_dt_populate and split pnv_chip_power10_common_realize as per review + patch #6-#11: no change - remove commit to make Power11 as default v2: + split powernv patch into homer,lpc,occ,psi,sbe + reduce code duplication by reusing power10 code + make power11 as default + rebase on qemu upstream/master + add more information in commit descriptions + update docs + update skiboot.lid Aditya Gupta (10): ppc/pnv: Add HOMER for Power11 ppc/pnv: Add a LPC controller for Power11 ppc/pnv: Add OCC for Power11 ppc/pnv: Add a PSI bridge model for Power11 ppc/pnv: Add SBE model for Power11 ppc/pnv: Introduce Pnv11Chip ppc/pnv: Introduce Power11 PowerNV machine ppc/pnv: Add XIVE2 controller to Power11 ppc/pnv: Add PHB5 PCIe Host bridge to Power11 ppc/pnv: Add ChipTOD model for Power11 docs/system/ppc/powernv.rst | 9 +- hw/ppc/pnv.c | 542 +++++++++++++++++++++++++++++++++++ hw/ppc/pnv_chiptod.c | 59 ++++ hw/ppc/pnv_core.c | 17 ++ hw/ppc/pnv_homer.c | 8 + hw/ppc/pnv_lpc.c | 14 + hw/ppc/pnv_occ.c | 14 + hw/ppc/pnv_psi.c | 24 ++ hw/ppc/pnv_sbe.c | 15 + include/hw/ppc/pnv.h | 38 +++ include/hw/ppc/pnv_chip.h | 7 + include/hw/ppc/pnv_chiptod.h | 2 + include/hw/ppc/pnv_homer.h | 3 + include/hw/ppc/pnv_lpc.h | 4 + include/hw/ppc/pnv_occ.h | 2 + include/hw/ppc/pnv_psi.h | 2 +- include/hw/ppc/pnv_sbe.h | 2 + include/hw/ppc/pnv_xscom.h | 49 ++++ 18 files changed, 806 insertions(+), 5 deletions(-)