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X-Received-From: 216.71.153.141 Subject: [Qemu-devel] [PATCH v1 0/4] RISC-V: Populate mtval and stval X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, alistair.francis@wdc.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Populate mtval and stval when taking an illegal instruction exception if the features are set for the CPU. Alistair Francis (4): target/riscv: Rename mbadaddr and sbadaddr target/riscv: Implement the mtval illegal instruction target/riscv: Implement the stval illegal instruction target/riscv: set mtval and stval support target/riscv/cpu.c | 4 ++++ target/riscv/cpu.h | 8 +++++--- target/riscv/cpu_bits.h | 4 ++-- target/riscv/helper.c | 34 ++++++++++++++++++++++++++-------- target/riscv/op_helper.c | 16 ++++++++-------- target/riscv/translate.c | 12 ++++++++++++ 6 files changed, 57 insertions(+), 21 deletions(-)