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X-Received-From: 216.71.153.144 Subject: [Qemu-devel] [PATCH v6 0/5] Connect a PCIe host and graphics support to RISC-V X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "alistair23@gmail.com" , Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP V6: - Fix the interrupt issue for the GPEX device V5: - Rebase - Include pci.mak in the default configs V4: - Fix the spike device tree - Don't use stdvga device V3: - Remove Makefile config changes - Connect a network adapter to the virt device V2: - Use the gpex PCIe host for virt - Add support for SiFive U PCIe Alistair Francis (5): hw/riscv/virt: Increase the number of interrupts hw/riscv/virt: Connect the gpex PCIe riscv: Enable VGA and PCIE_VGA hw/riscv/sifive_u: Connect the Xilinx PCIe hw/riscv/virt: Connect a VirtIO net PCIe device default-configs/riscv32-softmmu.mak | 10 ++- default-configs/riscv64-softmmu.mak | 10 ++- hw/riscv/sifive_u.c | 64 ++++++++++++++ hw/riscv/virt.c | 125 ++++++++++++++++++++++++++++ include/hw/riscv/sifive_u.h | 4 +- include/hw/riscv/virt.h | 8 +- 6 files changed, 216 insertions(+), 5 deletions(-)