From patchwork Sat Mar 15 09:14:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 14017869 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 186F6C35FF3 for ; Sat, 15 Mar 2025 09:15:39 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ttNbc-0002c2-Hl; Sat, 15 Mar 2025 05:14:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ttNbU-0002b2-Bm; Sat, 15 Mar 2025 05:14:49 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ttNbR-0007j8-J5; Sat, 15 Mar 2025 05:14:47 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 9E0DEFFBB1; Sat, 15 Mar 2025 12:13:45 +0300 (MSK) Received: from gandalf.tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with ESMTP id A3D541CAD4A; Sat, 15 Mar 2025 12:14:39 +0300 (MSK) Received: by gandalf.tls.msk.ru (Postfix, from userid 1000) id 92D3255A2A; Sat, 15 Mar 2025 12:14:39 +0300 (MSK) From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Michael Tokarev Subject: [Stable-7.2.17 00/27] Patch Round-up for stable 7.2.17, freeze on 2025-03-24 Date: Sat, 15 Mar 2025 12:14:11 +0300 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The following patches are queued for QEMU stable v7.2.17: https://gitlab.com/qemu-project/qemu/-/commits/staging-7.2 Patch freeze is 2025-03-24, and the release is planned for 2025-03-26: https://wiki.qemu.org/Planning/7.2 Please respond here or CC qemu-stable@nongnu.org on any additional patches you think should (or shouldn't) be included in the release. The changes which are staging for inclusion, with the original commit hash from master branch, are given below the bottom line. Thanks! /mjt -------------------------------------- 01 27a8d899c7a1 Khem Raj: linux-user: Do not define struct sched_attr if libc headers do 02 4dafba778aa3 Volker Rümelin: ui/sdl2: reenable the SDL2 Windows keyboard hook procedure 03 937df81af675 Peter Maydell: hw/net/smc91c111: Ignore attempt to pop from empty RX fifo 04 7a74e468089a Mikael Szreder: target/sparc: Fix gdbstub incorrectly handling registers f32-f62 05 b819fd699424 Peter Maydell: target/arm: Report correct syndrome for UNDEFINED CNTPS_*_EL1 from EL2 and NS EL1 06 ccda792945d6 Peter Maydell: target/arm: Report correct syndrome for UNDEFINED S1E2 AT ops at EL3 07 707d478ed8f2 Peter Maydell: target/arm: Report correct syndrome for UNDEFINED LOR sysregs when NS=0 08 4cf494865161 Peter Maydell: target/arm: Make CP_ACCESS_TRAPs to AArch32 EL3 be Monitor traps 09 d04c6c3c000a Peter Maydell: hw/intc/arm_gicv3_cpuif: Don't downgrade monitor traps for AArch32 EL3 10 464ce71a963b Bernhard Beschow: Kconfig: Extract CONFIG_USB_CHIPIDEA from CONFIG_IMX 11 63dc0b864739 Sairaj Kodilkar: amd_iommu: Use correct DTE field for interrupt passthrough 12 6291a28645a0 Philippe Mathieu-Daudé: hw/i386/amd_iommu: Explicit use of AMDVI_BASE_ADDR in amdvi_init 13 3684717b7407 Sairaj Kodilkar: amd_iommu: Use correct bitmask to set capability BAR 14 83cb18ac4500 Stefano Garzarella: cryptodev/vhost: allocate CryptoDevBackendVhost using g_mem0() 15 50e975414906 Konstantin Shkolnyy: vdpa: Fix endian bugs in shadow virtqueue 16 ffd455963f23 Max Chou: target/riscv: rvv: Fix unexpected behavior of vector reduction instructions when vl is 0 17 3fba76e61caa Daniel Henrique Barboza: target/riscv/debug.c: use wp size = 4 for 32-bit CPUs 18 c86edc547692 Daniel Henrique Barboza: target/riscv: throw debug exception before page fault 19 3521f9cadc29 Rodrigo Dias Correa: goldfish_rtc: Fix tick_offset migration 20 2ad638a3d160 Denis Rastyogin: block/qed: fix use-after-free by nullifying timer pointer after free 21 3b2e22c0bbe2 Patrick Venture: hw/gpio: npcm7xx: fixup out-of-bounds access 22 29c041ca7f8d Nicholas Piggin: ppc/pnv/occ: Fix common area sensor offsets 23 2fa3a5b94696 Peter Maydell: hw/net/smc91c111: Sanitize packet numbers 24 aad6f264add3 Peter Maydell: hw/net/smc91c111: Sanitize packet length on tx 25 700d3d6dd41d Peter Maydell: hw/net/smc91c111: Don't allow data register access to overrun buffer 26 b75c5f987916 Kevin Wolf: block: Zero block driver state before reopening 27 48170c2d865a Greg Kurz: docs: Rename default-configs to configs