Show patches with: State = Action Required       |   328970 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v3,do,not,apply] vvfat: refresh writing long filename [v3,do,not,apply] vvfat: refresh writing long filename - - - --- 2025-01-19 Michael Tokarev New
[v3,6/6] linux-user: netlink: Add missing QEMU_IFLA entries linux-user: Add support for various missing netlink sockopt entries - 1 - --- 2025-01-19 Helge Deller New
[v3,5/6] linux-user: netlink: add netlink neighbour emulation linux-user: Add support for various missing netlink sockopt entries - 1 - --- 2025-01-19 Helge Deller New
[v3,4/6] linux-user: netlink: Add emulation of IP_MULTICAST_IF linux-user: Add support for various missing netlink sockopt entries - - - --- 2025-01-19 Helge Deller New
[v3,3/6] linux-user: netlink: Add IP_PKTINFO cmsg parsing linux-user: Add support for various missing netlink sockopt entries - - - --- 2025-01-19 Helge Deller New
[v3,2/6] linux-user: Use unique error messages for cmsg parsing linux-user: Add support for various missing netlink sockopt entries - 2 - --- 2025-01-19 Helge Deller New
[v3,1/6] linux-user: netlink: Add missing IFA_PROTO to host_to_target_data_addr_rtattr() linux-user: Add support for various missing netlink sockopt entries - 1 - --- 2025-01-19 Helge Deller New
[PULL,v2,50/50] hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,49/50] target/riscv: Support Supm and Sspm as part of Zjpm v1.0 [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,48/50] hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,47/50] target/riscv: Add Smdbltrp ISA extension enable switch [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,46/50] target/riscv: Implement Smdbltrp behavior [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,45/50] target/riscv: Implement Smdbltrp sret, mret and mnret behavior [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,44/50] target/riscv: Add Smdbltrp CSRs handling [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,43/50] target/riscv: Add Ssdbltrp ISA extension enable switch [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,42/50] target/riscv: Implement Ssdbltrp exception handling [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,41/50] target/riscv: Implement Ssdbltrp sret, mret and mnret behavior [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,40/50] target/riscv: Add Ssdbltrp CSRs handling [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,39/50] target/riscv: Fix henvcfg potentially containing stale bits [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,38/50] target/riscv: Add configuration for S[m|s]csrind, Smcdeleg/Ssccfg [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,37/50] target/riscv: Add implied rule for counter delegation extensions [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,36/50] target/riscv: Invoke pmu init after feature enable [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,35/50] target/riscv: Add counter delegation/configuration support [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,34/50] target/riscv: Add select value range check for counter delegation [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,33/50] target/riscv: Add counter delegation definitions [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,32/50] target/riscv: Add properties for counter delegation ISA extensions [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,31/50] target/riscv: Support generic CSR indirect access [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,30/50] target/riscv: Enable S*stateen bits for AIA [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,29/50] target/riscv: Decouple AIA processing from xiselect and xireg [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,28/50] target/riscv: Add properties for Indirect CSR Access extension [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,27/50] hw/riscv/virt: Remove unnecessary use of &first_cpu [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,26/50] target/riscv: Have kvm_riscv_get_timebase_frequency() take RISCVCPU cpu [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,25/50] target/riscv: Add Zicfilp support for Smrnmi [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,24/50] target/riscv: Add Smrnmi cpu extension [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,23/50] target/riscv: Add Smrnmi mnret instruction [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,22/50] target/riscv: Handle Smrnmi interrupt and exception [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,21/50] target/riscv: Add Smrnmi CSRs [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,20/50] target/riscv: Add 'ext_smrnmi' in the RISCVCPUConfig [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,19/50] target/riscv: Enable updates for pointer masking variables and thus enable pointer … [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,18/50] target/riscv: Apply pointer masking for virtualized memory accesses [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,17/50] target/riscv: Update address modify functions to take into account pointer masking [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,16/50] target/riscv: Add pointer masking tb flags [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 3 - --- 2025-01-19 Alistair Francis New
[PULL,v2,15/50] target/riscv: Add helper functions to calculate current number of masked bits for p… [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,14/50] target/riscv: Add new CSR fields for S{sn, mn, m}pm extensions as part of Zjpm v1.0 [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,13/50] target/riscv: Remove obsolete pointer masking extension code. [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names 1 - - --- 2025-01-19 Alistair Francis New
[PULL,v2,12/50] target/riscv: add trace in riscv_raise_exception() [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,11/50] target/riscv: use RISCVException enum in exception helpers [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,10/50] target/riscv/tcg: add sha [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,09/50] target/riscv: add shgatpa [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,08/50] target/riscv: add shvsatpa [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,07/50] target/riscv: add shvstvecd [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,06/50] target/riscv: add shtvala [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,05/50] target/riscv: add shvstvala [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,04/50] target/riscv: add shcounterenw [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,03/50] riscv/gdbstub: add V bit to priv reg [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 1 - --- 2025-01-19 Alistair Francis New
[PULL,v2,02/50] target/riscv: rvv: speed up small unit-stride loads and stores [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 2 - --- 2025-01-19 Alistair Francis New
[PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names [PULL,v2,01/50] target/riscv: rvv: fix typo in vext continuous ldst function names - 3 - --- 2025-01-19 Alistair Francis New
[PULL,v2,00/50] riscv-to-apply queue - - - --- 2025-01-19 Alistair Francis New
[v2] vvfat: refresh writing long filename [v2] vvfat: refresh writing long filename - - - --- 2025-01-18 Michael Tokarev New
vvfat: refresh writing long filename vvfat: refresh writing long filename - - - --- 2025-01-18 Michael Tokarev New
[v7,4/4] qemu-options.hx: describe hub chardev and aggregation of several backends chardev: implement backend chardev multiplexing - - - --- 2025-01-18 Roman Penyaev New
[v7,3/4] tests/unit/test-char: add unit tests for hub chardev backend chardev: implement backend chardev multiplexing - - - --- 2025-01-18 Roman Penyaev New
[v7,2/4] chardev/char-hub: implement backend chardev aggregator chardev: implement backend chardev multiplexing - - - --- 2025-01-18 Roman Penyaev New
[v7,1/4] chardev/char-pty: send CHR_EVENT_CLOSED on disconnect chardev: implement backend chardev multiplexing - - - --- 2025-01-18 Roman Penyaev New
[v2,8/8] hw/usb/hcd-xhci-pci: Add TI TUSB73X0 XHCI controller model usb/xhci: TR NOOP, TI HCD device, more qtests - - - --- 2025-01-18 Nicholas Piggin New
[v2,7/8] hw/usb/hcd-xhci-pci: Make PCI device more configurable usb/xhci: TR NOOP, TI HCD device, more qtests - - - --- 2025-01-18 Nicholas Piggin New
[v2,6/8] tests/qtest/xhci: test the qemu-xhci device usb/xhci: TR NOOP, TI HCD device, more qtests - - - --- 2025-01-18 Nicholas Piggin New
[v2,5/8] tests/qtest/xhci: add a test for TR NOOP commands usb/xhci: TR NOOP, TI HCD device, more qtests - - - --- 2025-01-18 Nicholas Piggin New
[v2,4/8] hw/usb/xhci: Support TR NOOP commands usb/xhci: TR NOOP, TI HCD device, more qtests - - - --- 2025-01-18 Nicholas Piggin New
[v2,3/8] tests/qtest/xhci: Add controller and device setup and ring tests usb/xhci: TR NOOP, TI HCD device, more qtests - - - --- 2025-01-18 Nicholas Piggin New
[v2,2/8] hw/usb/xhci: Rename and move HCD register region constants to header usb/xhci: TR NOOP, TI HCD device, more qtests - - - --- 2025-01-18 Nicholas Piggin New
[v2,1/8] hw/usb/xhci: Move HCD constants to a header and add register constants usb/xhci: TR NOOP, TI HCD device, more qtests - - - --- 2025-01-18 Nicholas Piggin New
[1/1] pc-bios/s390-ccw: Abort IPL on invalid loadparm s390x: Abort immediately on invalid loadparm - - - --- 2025-01-17 Jared Rossi New
[10/10] rust: bindings for MemoryRegionOps rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
[09/10] rust: bindings: add Sync markers to types referred to by MemoryRegionOps rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
[08/10] rust: qdev: switch from legacy reset to Resettable rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
[07/10] rust: qdev: make ObjectImpl a supertrait of DeviceImpl rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
[06/10] rust: qom: allow initializing interface vtables rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
[05/10] rust: qdev: add clock creation rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
[04/10] rust: callbacks: allow passing optional callbacks as () rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
[03/10] rust: qom: add object creation functionality rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
[02/10] rust: qom: add reference counting functionality rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
[01/10] rust: qemu-api: add sub-subclass to the integration tests rust: remaining part of qdev bindings - - - --- 2025-01-17 Paolo Bonzini New
hw/i386/pc: Fix crash that occurs when introspecting TYPE_PC_MACHINE machines hw/i386/pc: Fix crash that occurs when introspecting TYPE_PC_MACHINE machines - - - --- 2025-01-17 Thomas Huth New
[2/2] docs/cpu-features: Update "PAuth" (Pointer Authentication) details docs: A couple of small changes to system/arm/cpu-features - - - --- 2025-01-17 Kashyap Chamarthy New
[1/2] docs/cpu-features: Consistently use vCPU instead of VCPU docs: A couple of small changes to system/arm/cpu-features - - - --- 2025-01-17 Kashyap Chamarthy New
[PULL,68/68] softfloat: Constify helpers returning float_status field [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
[PULL,67/68] accel/tcg: Call tcg_tb_insert() for one-insn TBs [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 2 - --- 2025-01-17 Richard Henderson New
[PULL,66/68] tcg: Document tb_lookup() and tcg_tb_lookup() [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 2 - --- 2025-01-17 Richard Henderson New
[PULL,65/68] linux-user: Add missing /proc/cpuinfo fields for sparc [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
[PULL,64/68] tcg/riscv: Use BEXTI for single-bit extractions [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble 1 - - --- 2025-01-17 Richard Henderson New
[PULL,63/68] util/cpuinfo-riscv: Detect Zbs [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble 1 1 - --- 2025-01-17 Richard Henderson New
[PULL,62/68] tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64} [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
[PULL,61/68] tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64} [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
[PULL,60/68] tcg/tci: Remove assertions for deposit and extract [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
[PULL,59/68] tcg/tci: Provide TCG_TARGET_{s}extract_valid [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
[PULL,58/68] tcg/sparc64: Use SRA, SRL for {s}extract_i64 [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
[PULL,57/68] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extract [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
[PULL,56/68] tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
[PULL,55/68] tcg/riscv64: Fold the ext{8, 16, 32}[us] cases into {s}extract [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble - 1 - --- 2025-01-17 Richard Henderson New
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