Show patches with: State = Action Required       |   336798 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[25/38] target/hexagon: Add TCG overrides for thread ctl hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[24/38] target/hexagon: Add TCG overrides for int handler insts hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[23/38] target/hexagon: Add implicit attributes to sysemu macros hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[22/38] target/hexagon: Add sysemu TCG overrides hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[21/38] target/hexagon: Add system reg insns hexagon system emu, part 1/3 - - - --- 2025-03-01 Brian Cain New
[20/38] target/hexagon: Implement do_raise_exception() hexagon system emu, part 1/3 - - - --- 2025-03-01 Brian Cain New
[19/38] target/hexagon: Define register fields for system regs hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[18/38] target/hexagon: Make A_PRIV, "J2_trap*" insts need_env() hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[17/38] target/hexagon: Add vmstate representation hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[16/38] target/hexagon: Add placeholder greg/sreg r/w helpers hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[15/38] target/hexagon: Add handlers for guest/sysreg r/w hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[14/38] target/hexagon: Add new macro definitions for sysemu hexagon system emu, part 1/3 - - - --- 2025-03-01 Brian Cain New
[13/38] target/hexagon: Define DCache states hexagon system emu, part 1/3 - - - --- 2025-03-01 Brian Cain New
[12/38] target/hexagon: Add imported macro, attr defs for sysemu hexagon system emu, part 1/3 - - - --- 2025-03-01 Brian Cain New
[11/38] target/hexagon: Add guest/sys reg writes to DisasContext hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[10/38] target/hexagon: Add TCG values for sreg, greg hexagon system emu, part 1/3 - - - --- 2025-03-01 Brian Cain New
[09/38] target/hexagon: Add guest, system reg number state hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[08/38] target/hexagon: Add guest, system reg number defs hexagon system emu, part 1/3 - - - --- 2025-03-01 Brian Cain New
[07/38] target/hexagon: Add a placeholder fp exception hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[06/38] target/hexagon: Add privilege check, use tag_ignore() hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[05/38] target/hexagon: Switch to tag_ignore(), generate via get_{user, sys}_tags() hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[04/38] target/hexagon: Make gen_exception_end_tb non-static hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[03/38] target/hexagon: Add System/Guest register definitions hexagon system emu, part 1/3 - - - --- 2025-03-01 Brian Cain New
[02/38] docs/system: Add hexagon CPU emulation hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
[01/38] docs: Add hexagon sysemu docs hexagon system emu, part 1/3 - 1 - --- 2025-03-01 Brian Cain New
accel/tcg: fix msan findings in translate-all accel/tcg: fix msan findings in translate-all - - - --- 2025-02-28 Patrick Venture New
util/keyval: fix msan findings util/keyval: fix msan findings - - - --- 2025-02-28 Patrick Venture New
[v6,8/8] i386/cpu: Adjust level for RDT on full_cpuid_auto_level [v6,1/8] i386: Add Intel RDT device and State to config. - - - --- 2025-02-28 Hendrik Wuethrich New
[v6,7/8] i386/cpu: Adjust CPUID level for RDT features [v6,1/8] i386: Add Intel RDT device and State to config. - - - --- 2025-02-28 Hendrik Wuethrich New
[v6,6/8] i386: Add RDT feature flags. [v6,1/8] i386: Add Intel RDT device and State to config. - - - --- 2025-02-28 Hendrik Wuethrich New
[v6,5/8] i386: Add CPUID enumeration for RDT [v6,1/8] i386: Add Intel RDT device and State to config. - - - --- 2025-02-28 Hendrik Wuethrich New
[v6,4/8] i386: Add RDT device interface through MSRs [v6,1/8] i386: Add Intel RDT device and State to config. - - - --- 2025-02-28 Hendrik Wuethrich New
[v6,3/8] i386: Add RDT functionality [v6,1/8] i386: Add Intel RDT device and State to config. - - - --- 2025-02-28 Hendrik Wuethrich New
[v6,2/8] i386: Add init and realize functionality for RDT device. [v6,1/8] i386: Add Intel RDT device and State to config. - - - --- 2025-02-28 Hendrik Wuethrich New
[v6,1/8] i386: Add Intel RDT device and State to config. [v6,1/8] i386: Add Intel RDT device and State to config. - - - --- 2025-02-28 Hendrik Wuethrich New
[v2] iotest: Unbreak 302 with python 3.13 [v2] iotest: Unbreak 302 with python 3.13 - 2 - --- 2025-02-28 Nir Soffer New
hw/net/smc91c111: Don't allow data register access to overrun buffer hw/net/smc91c111: Don't allow data register access to overrun buffer - 1 - --- 2025-02-28 Peter Maydell New
[v6,6/6] target/i386: Add support for EPYC-Turin model target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 1 - --- 2025-02-28 Babu Moger New
[v6,5/6] target/i386: Update EPYC-Genoa for Cache property, perfmon-v2, RAS and SVM feature bits target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-28 Babu Moger New
[v6,4/6] target/i386: Add feature that indicates WRMSR to BASE reg is non-serializing target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-28 Babu Moger New
[v6,3/6] target/i386: Update EPYC-Milan CPU model for Cache property, RAS, SVM feature bits target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-28 Babu Moger New
[v6,2/6] target/i386: Update EPYC-Rome CPU model for Cache property, RAS, SVM feature bits target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-28 Babu Moger New
[v6,1/6] target/i386: Update EPYC CPU model for Cache property, RAS, SVM feature bits target/i386: Update EPYC CPU models for Cache property, RAS, SVM feature and add EPYC-Turin CPU mod… - 2 - --- 2025-02-28 Babu Moger New
[RFC] gitlab: add a new build_unit job to track build size [RFC] gitlab: add a new build_unit job to track build size - 1 - --- 2025-02-28 Alex Bennée New
[3/3] hw/net/smc91c111: Use MAX_PACKET_SIZE instead of magic numbers hw/net/smc91c111: Fix potential array overflows - 1 - --- 2025-02-28 Peter Maydell New
[2/3] hw/net/smc91c111: Sanitize packet length on tx hw/net/smc91c111: Fix potential array overflows - 1 - --- 2025-02-28 Peter Maydell New
[1/3] hw/net/smc91c111: Sanitize packet numbers hw/net/smc91c111: Fix potential array overflows - 1 - --- 2025-02-28 Peter Maydell New
hw/i386/ovmf: check if ovmf is supported before calling ovmf parsing code hw/i386/ovmf: check if ovmf is supported before calling ovmf parsing code - 1 - --- 2025-02-28 Ani Sinha New
target/arm: Make dummy debug registers RAZ, not NOP target/arm: Make dummy debug registers RAZ, not NOP - 1 - --- 2025-02-28 Peter Maydell New
[PULL,3/3] scripts: forbid use of arbitrary SPDX tags besides license identifiers [PULL,1/3] scripts: mandate that new files have SPDX-License-Identifier - 1 - --- 2025-02-28 Daniel P. Berrangé New
[PULL,2/3] scripts: validate SPDX license choices [PULL,1/3] scripts: mandate that new files have SPDX-License-Identifier - 1 - --- 2025-02-28 Daniel P. Berrangé New
[PULL,1/3] scripts: mandate that new files have SPDX-License-Identifier [PULL,1/3] scripts: mandate that new files have SPDX-License-Identifier - 2 - --- 2025-02-28 Daniel P. Berrangé New
[PULL,0/3] SPDX checkpatch - - - --- 2025-02-28 Daniel P. Berrangé New
docs/devel/qapi-code-gen: Discourage use of 'prefix' docs/devel/qapi-code-gen: Discourage use of 'prefix' - 1 - --- 2025-02-28 Markus Armbruster New
[v7,5/5] migration: add MULTIFD_RECV_SYNC migration command Allow to enable multifd and postcopy migration together - - - --- 2025-02-28 Prasad Pandit New
[v7,4/5] tests/qtest/migration: add postcopy tests with multifd Allow to enable multifd and postcopy migration together - - - --- 2025-02-28 Prasad Pandit New
[v7,3/5] tests/qtest/migration: consolidate set capabilities Allow to enable multifd and postcopy migration together - - - --- 2025-02-28 Prasad Pandit New
[v7,2/5] migration: enable multifd and postcopy together Allow to enable multifd and postcopy migration together - - - --- 2025-02-28 Prasad Pandit New
[v7,1/5] migration/multifd: move macros to multifd header Allow to enable multifd and postcopy migration together - 1 - --- 2025-02-28 Prasad Pandit New
[v3] hw/i386: introduce x86_firmware_reconfigure api [v3] hw/i386: introduce x86_firmware_reconfigure api - 1 - --- 2025-02-28 Ani Sinha New
include/exec/memop.h: Expand comment for MO_ATOM_SUBALIGN include/exec/memop.h: Expand comment for MO_ATOM_SUBALIGN - 1 - --- 2025-02-28 Peter Maydell New
[v2] hw/i386: introduce x86_firmware_reconfigure api [v2] hw/i386: introduce x86_firmware_reconfigure api - - - --- 2025-02-28 Ani Sinha New
[22/22] target/riscv: remove .instance_post_init target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[21/22] target/riscv: convert Xiangshan Nanhu to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[20/22] target/riscv: convert Ventana V1 to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[19/22] target/riscv: convert TT Ascalon to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[18/22] target/riscv: convert TT C906 to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[17/22] target/riscv: generalize custom CSR functionality target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[16/22] target/riscv: th: make CSR insertion test a bit more intuitive target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[15/22] target/riscv: convert SiFive U models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[v2,7/7] tests/functional: stop output from zstd command when uncompressing tests/functional: a few misc cleanups and fixes - 1 - --- 2025-02-28 Daniel P. Berrangé New
[14/22] target/riscv: convert ibex CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[13/22] target/riscv: convert SiFive E CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[v2,6/7] tests/functional: drop unused 'get_tag' method tests/functional: a few misc cleanups and fixes - 1 - --- 2025-02-28 Daniel P. Berrangé New
[12/22] target/riscv: convert dynamic CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[v2,5/7] tests/functional: skip memaddr tests on 32-bit builds tests/functional: a few misc cleanups and fixes - 2 - --- 2025-02-28 Daniel P. Berrangé New
[11/22] target/riscv: convert bare CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[v2,4/7] tests/functional: reduce tuxrun maxmem to work on 32-bit hosts tests/functional: a few misc cleanups and fixes - 2 - --- 2025-02-28 Daniel P. Berrangé New
[10/22] target/riscv: convert profile CPU models to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[v2,3/7] tests/functional: remove all class level fields tests/functional: a few misc cleanups and fixes - 2 - --- 2025-02-28 Daniel P. Berrangé New
[09/22] target/riscv: do not make RISCVCPUConfig fields conditional target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[v2,2/7] tests/functional: set 'qemu_bin' as an object level field tests/functional: a few misc cleanups and fixes - 2 - --- 2025-02-28 Daniel P. Berrangé New
[v2,1/7] tests/functional: remove unused 'bin_prefix' variable tests/functional: a few misc cleanups and fixes - 2 - --- 2025-02-28 Daniel P. Berrangé New
[08/22] target/riscv: convert abstract CPU classes to RISCVCPUDef target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[07/22] target/riscv: add more RISCVCPUDef fields target/riscv: declarative CPU definitions - - - --- 2025-02-28 Paolo Bonzini New
[06/22] target/riscv: move RISCVCPUConfig fields to a header file target/riscv: declarative CPU definitions - 1 - --- 2025-02-28 Paolo Bonzini New
[05/22] target/riscv: merge riscv_cpu_class_init with the class_base function target/riscv: declarative CPU definitions - 1 - --- 2025-02-28 Paolo Bonzini New
[04/22] target/riscv: store RISCVCPUDef struct directly in the class target/riscv: declarative CPU definitions - 1 - --- 2025-02-28 Paolo Bonzini New
[03/22] target/riscv: introduce RISCVCPUDef target/riscv: declarative CPU definitions - 1 - --- 2025-02-28 Paolo Bonzini New
[02/22] target/riscv: Convert misa_mxl_max using GLib macros target/riscv: declarative CPU definitions - 2 - --- 2025-02-28 Paolo Bonzini New
[01/22] target/riscv: Declare RISCVCPUClass::misa_mxl_max as RISCVMXL target/riscv: declarative CPU definitions - 2 - --- 2025-02-28 Paolo Bonzini New
[6/6] tests/qtest: Enable bios-tables-test for LoongArch Add bios-tables-test for LoongArch64 system - 1 - --- 2025-02-28 bibo mao New
[5/6] tests/acpi: Fill acpi table data for LoongArch Add bios-tables-test for LoongArch64 system - - - --- 2025-02-28 bibo mao New
[4/6] tests/acpi: Add empty ACPI data files for LoongArch64 Add bios-tables-test for LoongArch64 system - - - --- 2025-02-28 bibo mao New
[3/6] tests/qtest/bios-tables-test: Add basic testing for LoongArch64 Add bios-tables-test for LoongArch64 system - - - --- 2025-02-28 bibo mao New
[2/6] tests/data/uefi-boot-images: Add ISO image for LoongArch system Add bios-tables-test for LoongArch64 system - - - --- 2025-02-28 bibo mao New
[1/6] uefi-test-tools:: Add LoongArch64 support Add bios-tables-test for LoongArch64 system - - - --- 2025-02-28 bibo mao New
[v5,2/2] target/loongarch: check tlb_ps target/loongarch: fix 'make check-functional' failed - - - --- 2025-02-28 Song Gao New
[v5,1/2] target/loongarch: fix 'make check-functional' failed target/loongarch: fix 'make check-functional' failed - 1 - --- 2025-02-28 Song Gao New
rust: qom: remove operations on &mut rust: qom: remove operations on &mut - 1 - --- 2025-02-28 Paolo Bonzini New
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