Show patches with: Series = [PULL,1/7] pl031: Expose RTCICR as proper WC register       |    State = Action Required       |   7 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[PULL,7/7] target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLY [PULL,1/7] pl031: Expose RTCICR as proper WC register - 1 - --- 2019-11-19 Peter Maydell New
[PULL,6/7] target/arm: Relax r13 restriction for ldrex/strex for v8.0 [PULL,1/7] pl031: Expose RTCICR as proper WC register - 1 - --- 2019-11-19 Peter Maydell New
[PULL,5/7] target/arm: Do not reject rt == rt2 for strexd [PULL,1/7] pl031: Expose RTCICR as proper WC register - 2 - --- 2019-11-19 Peter Maydell New
[PULL,4/7] net/cadence_gem: Set PHY autonegotiation restart status [PULL,1/7] pl031: Expose RTCICR as proper WC register - 1 - --- 2019-11-19 Peter Maydell New
[PULL,3/7] ssi: xilinx_spips: Skip spi bus update for a few register writes [PULL,1/7] pl031: Expose RTCICR as proper WC register - 3 1 --- 2019-11-19 Peter Maydell New
[PULL,2/7] target/arm: Merge arm_cpu_vq_map_next_smaller into sole caller [PULL,1/7] pl031: Expose RTCICR as proper WC register - 1 - --- 2019-11-19 Peter Maydell New
[PULL,1/7] pl031: Expose RTCICR as proper WC register [PULL,1/7] pl031: Expose RTCICR as proper WC register - 1 - --- 2019-11-19 Peter Maydell New