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«
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2009
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3041
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Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[PULL,07/27] s390x/tcg: Simplify disassembler operands initialization
[PULL,01/27] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
- 2 -
-
-
-
2019-03-04
Cornelia Huck
New
[PULL,06/27] s390x/tcg: RXE has an optional M3 field
[PULL,01/27] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
- 2 -
-
-
-
2019-03-04
Cornelia Huck
New
[PULL,05/27] s390x/vfio-ap: document hot plug/unplug of vfio-ap device
[PULL,01/27] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
- - -
-
-
-
2019-03-04
Cornelia Huck
New
[PULL,04/27] s390x/vfio-ap: Implement hot plug/unplug of vfio-ap device
[PULL,01/27] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
- 3 1
-
-
-
2019-03-04
Cornelia Huck
New
[PULL,03/27] s390x/tcg: Save vregs to extended mchk save area
[PULL,01/27] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
- 1 -
-
-
-
2019-03-04
Cornelia Huck
New
[PULL,02/27] s390x: use a QEMU-style typedef + name for SIGP save area struct
[PULL,01/27] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
1 1 -
-
-
-
2019-03-04
Cornelia Huck
New
[PULL,01/27] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
[PULL,01/27] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
- 2 -
-
-
-
2019-03-04
Cornelia Huck
New
[PULL,00/27] s390x updates
- - -
-
-
-
2019-03-04
Cornelia Huck
New
PPC: E500: Update u-boot to v2019.01
PPC: E500: Update u-boot to v2019.01
- - -
-
-
-
2019-03-04
Alexander Graf
New
cirrus.yml: Add macOS continuous integration task
cirrus.yml: Add macOS continuous integration task
1 1 -
-
-
-
2019-03-04
Thomas Huth
New
[v12,10/10] hw/arm/virt: Bump the 255GB initial RAM limit
ARM virt: Initial RAM expansion and extended memory map
- 1 -
-
-
-
2019-03-04
Eric Auger
New
[v12,09/10] hw/arm/virt: Check the VCPU PA range in TCG mode
ARM virt: Initial RAM expansion and extended memory map
- 1 -
-
-
-
2019-03-04
Eric Auger
New
[v12,08/10] hw/arm/virt: Implement kvm_type function for 4.0 machine
ARM virt: Initial RAM expansion and extended memory map
- 1 -
-
-
-
2019-03-04
Eric Auger
New
[v12,07/10] hw/arm/virt: Dynamic memory map depending on RAM requirements
ARM virt: Initial RAM expansion and extended memory map
- 1 -
-
-
-
2019-03-04
Eric Auger
New
[v12,06/10] vl: Set machine ram_size, maxram_size and ram_slots earlier
ARM virt: Initial RAM expansion and extended memory map
- 2 -
-
-
-
2019-03-04
Eric Auger
New
[v12,05/10] kvm: add kvm_arm_get_max_vm_ipa_size
ARM virt: Initial RAM expansion and extended memory map
- 1 -
-
-
-
2019-03-04
Eric Auger
New
[v12,04/10] hw/boards: Add a MachineState parameter to kvm_type callback
ARM virt: Initial RAM expansion and extended memory map
1 2 -
-
-
-
2019-03-04
Eric Auger
New
[v12,03/10] hw/arm/virt: Split the memory map description
ARM virt: Initial RAM expansion and extended memory map
- 1 -
-
-
-
2019-03-04
Eric Auger
New
[v12,02/10] hw/arm/virt: Rename highmem IO regions
ARM virt: Initial RAM expansion and extended memory map
- 2 -
-
-
-
2019-03-04
Eric Auger
New
[v12,01/10] hw/arm/boot: introduce fdt_add_memory_node helper
ARM virt: Initial RAM expansion and extended memory map
- 2 -
-
-
-
2019-03-04
Eric Auger
New
[3/3] iotests: check whitelisted formats
iotests: check whitelisted formats
- - -
-
-
-
2019-03-04
Andrey Shinkevich
New
[2/3] iotests: ask QEMU for supported formats
iotests: check whitelisted formats
- - -
-
-
-
2019-03-04
Andrey Shinkevich
New
[1/3] block: iterate_format with account of whitelisting
iotests: check whitelisted formats
- - -
-
-
-
2019-03-04
Andrey Shinkevich
New
migration/rdma: clang compilation fix
migration/rdma: clang compilation fix
- - -
-
-
-
2019-03-04
Marcel Apfelbaum
New
[v6,2/2] CODING_STYLE: indent example code as all others
CODING_STYLE: trivial update
- 3 -
-
-
-
2019-03-04
Wei Yang
New
[v6,1/2] CODING_STYLE: specify the indent rule for multiline code
CODING_STYLE: trivial update
- 1 -
-
-
-
2019-03-04
Wei Yang
New
exec.c: remove an unnecessary condition in flatview_add_to_dispatch()
exec.c: remove an unnecessary condition in flatview_add_to_dispatch()
- - -
-
-
-
2019-03-04
Wei Yang
New
x86: define a new MSR based feature word -- FEAT_CORE_CAPABILITY
x86: define a new MSR based feature word -- FEAT_CORE_CAPABILITY
- - -
-
-
-
2019-03-04
Xiaoyao Li
New
[v2] Re-applying Freescale PPC E500 i2c/RTC patch
[v2] Re-applying Freescale PPC E500 i2c/RTC patch
- - -
-
-
-
2019-03-04
Andrew Randrianasulu
New
[v4,9/9] hw/pvrdma: Unregister from shutdown notifier when device goes down
Misc fixes to pvrdma device
- 1 -
-
-
-
2019-03-03
Yuval Shaia
New
[v4,8/9] hw/pvrdma: Delete pvrdma_exit function
Misc fixes to pvrdma device
- 1 -
-
-
-
2019-03-03
Yuval Shaia
New
[v4,7/9] hw/pvrdma: Delete unneeded function argument
Misc fixes to pvrdma device
- 1 -
-
-
-
2019-03-03
Yuval Shaia
New
[v4,6/9] hw/rdma: Free all receive buffers when QP is destroyed
Misc fixes to pvrdma device
- 1 -
-
-
-
2019-03-03
Yuval Shaia
New
[v4,5/9] hw/rdma: Free all MAD receive buffers when device is closed
Misc fixes to pvrdma device
- 1 -
-
-
-
2019-03-03
Yuval Shaia
New
[v4,4/9] {hmp, hw/pvrdma}: Expose device internals via monitor interface
Misc fixes to pvrdma device
2 1 -
-
-
-
2019-03-03
Yuval Shaia
New
[v4,3/9] hw/rdma: Protect against concurrent execution of poll_cq
Misc fixes to pvrdma device
- 1 -
-
-
-
2019-03-03
Yuval Shaia
New
[v4,2/9] hw/rdma: Introduce protected qlist
Misc fixes to pvrdma device
- 1 -
-
-
-
2019-03-03
Yuval Shaia
New
[v4,1/9] hw/rdma: Switch to generic error reporting way
Misc fixes to pvrdma device
- 1 -
-
-
-
2019-03-03
Yuval Shaia
New
[PULLv2] Reduce curses escdelay from 1s to 25ms
[PULLv2] Reduce curses escdelay from 1s to 25ms
- - -
-
-
-
2019-03-03
Samuel Thibault
New
[8/8] target/ppc: simplify get_cpu_vsrh() and get_cpu_vsrl() functions
target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
- - -
-
-
-
2019-03-03
Mark Cave-Ayland
New
[7/8] target/ppc: introduce vsrh_offset() function
target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
- - -
-
-
-
2019-03-03
Mark Cave-Ayland
New
[6/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
- 1 -
-
-
-
2019-03-03
Mark Cave-Ayland
New
[5/8] target/ppc: introduce avr_offset() function
target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
- - -
-
-
-
2019-03-03
Mark Cave-Ayland
New
[4/8] target/ppc: introduce avrh_offset() and avrl_offset() functions
target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
- - -
-
-
-
2019-03-03
Mark Cave-Ayland
New
[3/8] target/ppc: move Vsr* macros from internal.h to cpu.h
target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
- - -
-
-
-
2019-03-03
Mark Cave-Ayland
New
[2/8] target/ppc: introduce single vsrl_offset() function
target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
- 1 -
-
-
-
2019-03-03
Mark Cave-Ayland
New
[1/8] target/ppc: introduce single fpr_offset() function
[1/8] target/ppc: introduce single fpr_offset() function
- 1 -
-
-
-
2019-03-03
Mark Cave-Ayland
New
[V3,7/7] Migration/colo.c: Make user obtain the COLO mode info after failover
Migration/colo: Fix upstream bugs when occur failover
- - -
-
-
-
2019-03-03
Zhang, Chen
New
[V3,6/7] Migration/colo.c: Add the necessary checks for colo_do_failover
Migration/colo: Fix upstream bugs when occur failover
- 2 -
-
-
-
2019-03-03
Zhang, Chen
New
[V3,5/7] qapi/migration.json: Remove a variable that doesn't exist in example
Migration/colo: Fix upstream bugs when occur failover
- 1 -
-
-
-
2019-03-03
Zhang, Chen
New
[V3,4/7] Migration/colo.c: Add new COLOExitReason to handle all failover state
Untitled series #87099
- 1 -
-
-
-
2019-03-03
Zhang, Chen
New
[V3,3/7] Migration/colo.c: Make COLO node running after failover
Migration/colo: Fix upstream bugs when occur failover
- 1 -
-
-
-
2019-03-03
Zhang, Chen
New
[V3,2/7] Migration/colo.c: Fix COLO failover status error
Migration/colo: Fix upstream bugs when occur failover
- 1 -
-
-
-
2019-03-03
Zhang, Chen
New
[V3,1/7] Migration/colo.c: Fix double close bug when occur COLO failover
Migration/colo: Fix upstream bugs when occur failover
- 1 -
-
-
-
2019-03-03
Zhang, Chen
New
[2/2] curses: add option to specify VGA font encoding
curses: Add support for wide output
- - -
-
-
-
2019-03-03
Samuel Thibault
New
[1/2] iconv: detect and make curses depend on it
curses: Add support for wide output
- - -
-
-
-
2019-03-03
Samuel Thibault
New
Reduce curses escdelay from 1s to 0.2s
Reduce curses escdelay from 1s to 0.2s
- - -
-
-
-
2019-03-03
Samuel Thibault
New
slirp: Mark pieces missing IPv6 support
slirp: Mark pieces missing IPv6 support
- - -
-
-
-
2019-03-03
Samuel Thibault
New
[v4] hw/display: Add basic ATI VGA emulation
[v4] hw/display: Add basic ATI VGA emulation
1 1 1
-
-
-
2019-03-02
BALATON Zoltan
New
[2/2] util/error: Remove unnecessary saved_errno
util/error: Trivial cleanup
- - -
-
-
-
2019-03-02
Philippe Mathieu-Daudé
New
[1/2] util/error: Remove an unnecessary NULL check
util/error: Trivial cleanup
- 2 -
-
-
-
2019-03-02
Philippe Mathieu-Daudé
New
BootLinuxConsoleTest: Let extract_from_deb handle various compressions
BootLinuxConsoleTest: Let extract_from_deb handle various compressions
- - 1
-
-
-
2019-03-02
Philippe Mathieu-Daudé
New
Re-applying Freescale PPC E500 i2c/RTC patch
Re-applying Freescale PPC E500 i2c/RTC patch
- - -
-
-
-
2019-03-02
Andrew Randrianasulu
New
Forward-porting RTC device for eppc500 ?
Forward-porting RTC device for eppc500 ?
- - -
-
-
-
2019-03-02
Andrew Randrianasulu
New
decodetree: Add DisasContext to function part
decodetree: Add DisasContext to function part
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,11/11] MAINTAINERS: Add RX entry.
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,10/11] Add rx-softmmu
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,09/11] RX Target hardware definition
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,08/11] RX62N internal serial communication interface
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,07/11] RX62N internal timer modules
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,06/11] RX62N interrupt contorol uint
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,05/11] target/rx: miscellaneous functions
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,04/11] target/rx: RX disassembler
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,03/11] target/rx: CPU definition
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,02/11] target/rx: TCG helper
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
[RFC,v3,01/11] target/rx: TCG Translation
Add RX archtecture support
- - -
-
-
-
2019-03-02
Yoshinori Sato
New
slirp: fix big/little endian conversion in ident protocol
slirp: fix big/little endian conversion in ident protocol
- 1 -
-
-
-
2019-03-02
Samuel Thibault
New
[PULL,34/34] target/riscv: Remaining rvc insn reuse 32 bit translators
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
-
-
2019-03-01
Palmer Dabbelt
New
[PULL,33/34] target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
-
-
2019-03-01
Palmer Dabbelt
New
[PULL,32/34] target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
-
-
2019-03-01
Palmer Dabbelt
New
[PULL,31/34] target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
-
-
2019-03-01
Palmer Dabbelt
New
[PULL,30/34] target/riscv: Convert @cs_2 insns to share translation functions
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
-
-
2019-03-01
Palmer Dabbelt
New
[PULL,29/34] target/riscv: Remove decode_RV32_64G()
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
-
-
2019-03-01
Palmer Dabbelt
New
[PULL,28/34] target/riscv: Remove gen_system()
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
-
-
2019-03-01
Palmer Dabbelt
New
[PULL,27/34] target/riscv: Rename trans_arith to gen_arith
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
-
-
2019-03-01
Palmer Dabbelt
New
[PULL,26/34] target/riscv: Remove manual decoding of RV32/64M insn
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,25/34] target/riscv: Remove shift and slt insn manual decoding
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,24/34] target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,23/34] target/riscv: Move gen_arith_imm() decoding into trans_* functions
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,22/34] target/riscv: Remove manual decoding from gen_store()
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,21/34] target/riscv: Remove manual decoding from gen_load()
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,20/34] target/riscv: Remove manual decoding from gen_branch()
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,19/34] target/riscv: Remove gen_jalr()
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
1 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,18/34] target/riscv: Convert quadrant 2 of RVXC insns to decodetree
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,17/34] target/riscv: Convert quadrant 1 of RVXC insns to decodetree
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
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-
2019-03-01
Palmer Dabbelt
New
[PULL,16/34] target/riscv: Convert quadrant 0 of RVXC insns to decodetree
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
- 1 -
-
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-
2019-03-01
Palmer Dabbelt
New
[PULL,15/34] target/riscv: Convert RV priv insns to decodetree
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
1 1 -
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-
2019-03-01
Palmer Dabbelt
New
[PULL,14/34] target/riscv: Convert RV64D insns to decodetree
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
1 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,13/34] target/riscv: Convert RV32D insns to decodetree
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
1 1 -
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2019-03-01
Palmer Dabbelt
New
[PULL,12/34] target/riscv: Convert RV64F insns to decodetree
[PULL,01/34] target/riscv: Activate decodetree and implemnt LUI & AUIPC
1 1 -
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2019-03-01
Palmer Dabbelt
New
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