Show patches with: Series = RISC-V: Start to remove xlen preprocess       |   16 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v4,16/16] hw/riscv: Use the CPU to determine if 32-bit RISC-V: Start to remove xlen preprocess - 1 - --- 2020-12-16 Alistair Francis New
[v4,15/16] target/riscv: cpu: Set XLEN independently from target RISC-V: Start to remove xlen preprocess 1 2 1 --- 2020-12-16 Alistair Francis New
[v4,14/16] target/riscv: csr: Remove compile time XLEN checks RISC-V: Start to remove xlen preprocess 1 2 1 --- 2020-12-16 Alistair Francis New
[v4,13/16] target/riscv: cpu_helper: Remove compile time XLEN checks RISC-V: Start to remove xlen preprocess 1 3 1 --- 2020-12-16 Alistair Francis New
[v4,12/16] target/riscv: cpu: Remove compile time XLEN checks RISC-V: Start to remove xlen preprocess 1 3 1 --- 2020-12-16 Alistair Francis New
[v4,11/16] target/riscv: Specify the XLEN for CPUs RISC-V: Start to remove xlen preprocess 1 3 1 --- 2020-12-16 Alistair Francis New
[v4,10/16] target/riscv: Add a riscv_cpu_is_32bit() helper function RISC-V: Start to remove xlen preprocess 1 2 1 --- 2020-12-16 Alistair Francis New
[v4,09/16] target/riscv: fpu_helper: Match function defs in HELPER macros RISC-V: Start to remove xlen preprocess - - - --- 2020-12-16 Alistair Francis New
[v4,08/16] hw/riscv: sifive_u: Remove compile time XLEN checks RISC-V: Start to remove xlen preprocess 1 2 1 --- 2020-12-16 Alistair Francis New
[v4,07/16] hw/riscv: spike: Remove compile time XLEN checks RISC-V: Start to remove xlen preprocess 1 2 - --- 2020-12-16 Alistair Francis New
[v4,06/16] hw/riscv: virt: Remove compile time XLEN checks RISC-V: Start to remove xlen preprocess 1 2 1 --- 2020-12-16 Alistair Francis New
[v4,05/16] hw/riscv: boot: Remove compile time XLEN checks RISC-V: Start to remove xlen preprocess 1 2 1 --- 2020-12-16 Alistair Francis New
[v4,04/16] riscv: virt: Remove target macro conditionals RISC-V: Start to remove xlen preprocess 1 2 1 --- 2020-12-16 Alistair Francis New
[v4,03/16] riscv: spike: Remove target macro conditionals RISC-V: Start to remove xlen preprocess 1 2 - --- 2020-12-16 Alistair Francis New
[v4,02/16] target/riscv: Add a TYPE_RISCV_CPU_BASE CPU RISC-V: Start to remove xlen preprocess 1 2 1 --- 2020-12-16 Alistair Francis New
[v4,01/16] hw/riscv: Expand the is 32-bit check to support more CPUs RISC-V: Start to remove xlen preprocess 1 1 - --- 2020-12-16 Alistair Francis New