Toggle navigation
Patchwork
QEMU patches
Patches
Bundles
About this project
Login
Register
Mail settings
Show patches with
: Series =
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
| State =
Action Required
| 47 patches
Series
Submitter
State
any
Action Required
New
Under Review
Accepted
Rejected
RFC
Not Applicable
Changes Requested
Awaiting Upstream
Superseded
Deferred
Mainlined
Queued
Needs ACK
Handled Elsewhere
In Next
Search
Archived
No
Yes
Both
Delegate
------
Nobody
holtmann
holtmann
holtmann
agk
mchehab
mchehab
gregkh
gregkh
mtosatti
lethal
lethal
avi
cvaroqui
jbrassow
mikulas
dtor
bmarzins
tmlind
jmberg
jmberg
mcgrof
mcgrof
mcgrof
lenb
lenb
kyle
felipebalbi
varenet
helge
helge
khilman
khilman
khilman
khilman
jwoithe
mlin
Zhang Rui
Zhang Rui
iksaif
cjackiewicz
hmh
jbarnes
jbarnes
jbarnes
willy
snitzer
iwamatsu
dougsland
mjg59
rafael
rafael
rafael
ericvh@gmail.com
ykzhao
venkip
sandeen
pwsan
lucho@ionkov.net
rminnich
anholt
aystarik
roland
shefty
mason
glikely
krh
djbw
djbw
djbw
cmarinas
doyu
jrn
sage
tomba
mmarek
cjb
trondmy
jikos
bcousson
jic23
olof
olof
olof
nsekhar
weiny2
horms
horms
bwidawsk
bwidawsk
shemminger
eulfhan
josef
josef
josef
dianders
jpan9
hal
kdave
bleung
evalenti
jlbec
wsa
bhelgaas
vkoul
vkoul
szlin
davejiang
markgross
tagr
tiwai
vireshk
mmind
dledford
geert
geert
herbert
herbert
kvalo
kvalo
kvalo
bentiss
arend
rzwisler
stellarhopper
stellarhopper
jejb
matthias_bgg
dvhart
axboe
axboe
pcmoore
pcmoore
pcmoore
mkp
mkp
stefan_schmidt
leon
lucvoo
jsakkine
jsakkine
jsakkine
bamse
bamse
demarchi
krzk
groeck
groeck
sboyd
sboyd
mturquette
mturquette
0andriy
carlocaione
luca
dgc
kbingham
derosier
narmstrong
narmstrong
atull
tytso
tytso
djwong
bvanassche
omos
jpirko
jpirko
GustavoARSilva
pkshih
patersonc
brauner
shuahkh
shuahkh
shuahkh
palmer
palmer
jgg
Kishon
idosch
labbott
jsimmons
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
lfadmin
broonie
broonie
broonie
mricon
mricon
mricon
kees
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
lfgitoliteapi
arnd
linusw
perfinion
bbrezillon
bachradsusi
rostedt
rostedt
kholk
nbd
ebiggers
ebiggers
pavelm
sds
m0reeze
ganis
jwcart2
matttbe
andmur01
lorpie01
chanwoochoi
dlezcano
jhedberg
vudentz
robertfoss
bgix
tedd_an
tsbogend
wens
wcrobert
robher
kstewart
kwilczynski
hansg
bpf
netdev
dsa
ethtool
netdrv
martineau
abelloni
trix
pabeni
mani_sadhasivam
mlimonci
liusong6
mjp
tohojo
pmalani
prestwoj
prestwoj
dhowells
tzungbi
conchuod
paulmck
jes
mtkaczyk
colyli
cem
pateldipen1984
iweiny
iweiny
bjorn
mhiramat
JanKiszka
jaegeuk
mraynal
aring
konradybcio
ij
Hailan
jstitt007
denkenz
denkenz
mkorenbl
jjohnson
frank_li
geliang
mdraidci
mdraidci
peluse
joelgranados
Apply
Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[PULL,v2,47/47] bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,46/47] bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,45/47] bsd-user: Implement 'get_mcontext' for RISC-V
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,44/47] bsd-user: Implement RISC-V signal trampoline setup functions
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,43/47] bsd-user: Define RISC-V signal handling structures and constants
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,42/47] bsd-user: Add generic RISC-V64 target definitions
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,41/47] bsd-user: Define RISC-V system call structures and constants
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,40/47] bsd-user: Define RISC-V VM parameters and helper functions
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,39/47] bsd-user: Add RISC-V thread setup and initialization support
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,38/47] bsd-user: Implement RISC-V sysarch system call emulation
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,37/47] bsd-user: Add RISC-V signal trampoline setup function
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,36/47] bsd-user: Define RISC-V register structures and register copying
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,35/47] bsd-user: Add RISC-V ELF definitions and hardware capability detection
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,34/47] bsd-user: Implement RISC-V TLS register setup
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,33/47] bsd-user: Implement RISC-V CPU register cloning and reset functions
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,32/47] bsd-user: Add RISC-V CPU execution loop and syscall handling
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,31/47] bsd-user: Implement RISC-V CPU initialization and main loop
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,30/47] hw/intc: riscv-imsic: Fix interrupt state updates.
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,29/47] target/riscv/cpu_helper: Fix linking problem with semihosting disabled
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,28/47] target/riscv32: Fix masking of physical address
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,27/47] target: riscv: Add Svvptc extension support
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,26/47] hw/riscv: Respect firmware ELF entry point
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,25/47] docs/specs: add riscv-iommu
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,24/47] qtest/riscv-iommu-test: add init queues test
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,23/47] hw/riscv/riscv-iommu: add DBG support
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,22/47] hw/riscv/riscv-iommu: add ATS support
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,21/47] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,20/47] test/qtest: add riscv-iommu-pci tests
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,19/47] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,18/47] hw/riscv: add riscv-iommu-pci reference device
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,17/47] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,16/47] hw/riscv: add RISC-V IOMMU base emulation
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 - -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,15/47] hw/riscv: add riscv-iommu-bits.h
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 3 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,14/47] exec/memtxattr: add process identifier to the transaction attributes
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 3 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,13/47] target/riscv: Add textra matching condition for the triggers
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,12/47] target/riscv: Preliminary textra trigger CSR writting support
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,11/47] util/util/cpuinfo-riscv.c: fix riscv64 build on musl libc
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,10/47] target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,09/47] target/riscv: Stop timer with infinite timecmp
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,08/47] target/riscv/kvm: Fix the group bit setting of AIA
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,07/47] target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,06/47] target/riscv: fix za64rs enabling
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,05/47] target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,04/47] tests/acpi: Add expected ACPI SRAT AML file for RISC-V
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,03/47] tests/qtest/bios-tables-test.c: Enable numamem testing for RISC-V
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,02/47] tests/acpi: Add empty ACPI SRAT data file for RISC-V
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-24
Alistair Francis
New
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
[PULL,v2,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-24
Alistair Francis
New