Show patches with: Series = target/riscv: Add support for Control Transfer Records Ext.       |   7 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v5,7/7] target/riscv: machine: Add Control Transfer Record state description target/riscv: Add support for Control Transfer Records Ext. - - - --- 2024-12-05 Rajnesh Kanwal New
[v5,6/7] target/riscv: Add support to access ctrsource, ctrtarget, ctrdata regs. target/riscv: Add support for Control Transfer Records Ext. - - - --- 2024-12-05 Rajnesh Kanwal New
[v5,5/7] target/riscv: Add CTR sctrclr instruction. target/riscv: Add support for Control Transfer Records Ext. - - - --- 2024-12-05 Rajnesh Kanwal New
[v5,4/7] target/riscv: Add support to record CTR entries. target/riscv: Add support for Control Transfer Records Ext. - - - --- 2024-12-05 Rajnesh Kanwal New
[v5,3/7] target/riscv: Add support for Control Transfer Records extension CSRs. target/riscv: Add support for Control Transfer Records Ext. - - - --- 2024-12-05 Rajnesh Kanwal New
[v5,2/7] target/riscv: Add Control Transfer Records CSR definitions. target/riscv: Add support for Control Transfer Records Ext. 1 - - --- 2024-12-05 Rajnesh Kanwal New
[v5,1/7] target/riscv: Remove obsolete sfence.vm instruction target/riscv: Add support for Control Transfer Records Ext. - 2 - --- 2024-12-05 Rajnesh Kanwal New