Show patches with: Submitter = Edgar E. Iglesias       |    State = Action Required       |   7 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v1,4/4] hw/arm: versal: Connect the CRL hw/arm: versal: Add Cortex-R5s and CRL - 2 - --- 2022-04-06 Edgar E. Iglesias New
[v1,3/4] hw/misc: Add a model of the Xilinx Versal CRL hw/arm: versal: Add Cortex-R5s and CRL - 2 - --- 2022-04-06 Edgar E. Iglesias New
[v1,2/4] hw/arm: versal: Add the Cortex-R5Fs hw/arm: versal: Add Cortex-R5s and CRL - 2 - --- 2022-04-06 Edgar E. Iglesias New
[v1,1/4] hw/arm: versal: Create an APU CPU Cluster hw/arm: versal: Add Cortex-R5s and CRL - 2 - --- 2022-04-06 Edgar E. Iglesias New
[v1,1/1] hw/arm/boot: Rebuild hflags when modifying CPUState at boot hw/arm/boot: Rebuild hflags when modifying CPUState at boot - 3 - --- 2019-10-31 Edgar E. Iglesias New
[v5,2/2] hw/arm: versal: Add a virtual Xilinx Versal board arm: Add first models of Xilinx Versal SoC - - - --- 2018-11-02 Edgar E. Iglesias New
[v5,1/2] hw/arm: versal: Add a model of Xilinx Versal SoC arm: Add first models of Xilinx Versal SoC - - - --- 2018-11-02 Edgar E. Iglesias New