Show patches with: Submitter = Rob Bradford       |    State = Action Required       |   51 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
target/riscv: Set vtype.vill on CPU reset target/riscv: Set vtype.vill on CPU reset - 1 - --- 2024-09-30 Rob Bradford New
[v2] disas/riscv: Add decode for Zawrs extension [v2] disas/riscv: Add decode for Zawrs extension 1 - - --- 2024-07-05 Rob Bradford New
disas/riscv: Add decode for Zawrs extension disas/riscv: Add decode for Zawrs extension 1 - - --- 2024-06-26 Rob Bradford New
[v2] target/riscv: Remove experimental prefix from "B" extension [v2] target/riscv: Remove experimental prefix from "B" extension - 4 - --- 2024-05-14 Rob Bradford New
target/riscv: Remove experimental prefix from "B" extension target/riscv: Remove experimental prefix from "B" extension - 1 - --- 2024-05-07 Rob Bradford New
[v3,3/3] target/riscv: Expose Zaamo and Zalrsc extensions target/riscv: Add support for Zaamo & Zalrsc - 1 - --- 2024-01-23 Rob Bradford New
[v3,2/3] target/riscv: Check 'A' and split extensions for atomic instructions target/riscv: Add support for Zaamo & Zalrsc - 1 - --- 2024-01-23 Rob Bradford New
[v3,1/3] target/riscv: Add Zaamo and Zalrsc extension infrastructure target/riscv: Add support for Zaamo & Zalrsc - 1 - --- 2024-01-23 Rob Bradford New
[v2,2/2] target/riscv: Check 'A' and split extensions for atomic instructions target/riscv: Add support for Zaamo & Zalrsc - 1 - --- 2024-01-19 Rob Bradford New
[v2,1/2] target/riscv: Add Zaamo and Zalrsc extensions target/riscv: Add support for Zaamo & Zalrsc - 1 - --- 2024-01-19 Rob Bradford New
[2/2] target/riscv: Check 'A' and split extensions for atomic instructions target/riscv: Add support for Zaamo & Zalrsc - - - --- 2024-01-15 Rob Bradford New
[1/2] target/riscv: Add Zaamo and Zalrsc extensions target/riscv: Add support for Zaamo & Zalrsc - 1 - --- 2024-01-15 Rob Bradford New
[v2,2/2] target/riscv: Add step to validate 'B' extension target/riscv: Add support for 'B' extension - 3 - --- 2024-01-11 Rob Bradford New
[v2,1/2] target/riscv: Add infrastructure for 'B' MISA extension target/riscv: Add support for 'B' extension - 3 - --- 2024-01-11 Rob Bradford New
target/riscv: Check for 'A' extension on all atomic instructions target/riscv: Check for 'A' extension on all atomic instructions - 2 - --- 2024-01-10 Rob Bradford New
[3/3] target/riscv: Enable 'B' extension on max CPU type target/riscv: Add support for 'B' extension - 1 - --- 2024-01-09 Rob Bradford New
[2/3] target/riscv: Add step to validate 'B' extension target/riscv: Add support for 'B' extension - 2 - --- 2024-01-09 Rob Bradford New
[1/3] target/riscv: Add infrastructure for 'B' MISA extension target/riscv: Add support for 'B' extension - 2 - --- 2024-01-09 Rob Bradford New
[2/2] disas/riscv: Add amocas.[w,d,q] instructions Add support for (ratified) Zacas extension - 2 - --- 2023-12-07 Rob Bradford New
[1/2] target/riscv: Add support for Zacas extension Add support for (ratified) Zacas extension - 2 - --- 2023-12-07 Rob Bradford New
[v5,5/5] docs/about/deprecated: Document RISC-V "pmu-num" deprecation Support discontinuous PMU counters 1 2 - --- 2023-10-31 Rob Bradford New
[v5,4/5] target/riscv: Add "pmu-mask" property to replace "pmu-num" Support discontinuous PMU counters - 1 - --- 2023-10-31 Rob Bradford New
[v5,3/5] target/riscv: Use existing PMU counter mask in FDT generation Support discontinuous PMU counters - 3 - --- 2023-10-31 Rob Bradford New
[v5,2/5] target/riscv: Don't assume PMU counters are continuous Support discontinuous PMU counters - 3 - --- 2023-10-31 Rob Bradford New
[v5,1/5] target/riscv: Propagate error from PMU setup Support discontinuous PMU counters - 3 - --- 2023-10-31 Rob Bradford New
[v4,6/6] target/riscv: Use MAKE_64BIT_MASK instead of custom macro Support discontinuous PMU counters - 2 - --- 2023-10-18 Rob Bradford New
[v4,5/6] docs/about/deprecated: Document RISC-V "pmu-num" deprecation Support discontinuous PMU counters 1 2 - --- 2023-10-18 Rob Bradford New
[v4,4/6] target/riscv: Add "pmu-mask" property to replace "pmu-num" Support discontinuous PMU counters - - - --- 2023-10-18 Rob Bradford New
[v4,3/6] target/riscv: Use existing PMU counter mask in FDT generation Support discontinuous PMU counters - 3 - --- 2023-10-18 Rob Bradford New
[v4,2/6] target/riscv: Don't assume PMU counters are continuous Support discontinuous PMU counters - 3 - --- 2023-10-18 Rob Bradford New
[v4,1/6] target/riscv: Propagate error from PMU setup Support discontinuous PMU counters - 3 - --- 2023-10-18 Rob Bradford New
[v3,6/6] target/riscv: Use MAKE_64BIT_MASK instead of custom macro Support discontinuous PMU counters - 1 - --- 2023-10-13 Rob Bradford New
[v3,5/6] docs/about/deprecated: Document RISC-V "pmu-num" deprecation Support discontinuous PMU counters 1 - - --- 2023-10-13 Rob Bradford New
[v3,4/6] target/riscv: Add "pmu-mask" property to replace "pmu-num" Support discontinuous PMU counters - - - --- 2023-10-13 Rob Bradford New
[v3,3/6] target/riscv: Use existing PMU counter mask in FDT generation Support discontinuous PMU counters - 2 - --- 2023-10-13 Rob Bradford New
[v3,2/6] target/riscv: Don't assume PMU counters are continuous Support discontinuous PMU counters - 2 - --- 2023-10-13 Rob Bradford New
[v3,1/6] target/riscv: Propagate error from PMU setup Support discontinuous PMU counters - 2 - --- 2023-10-13 Rob Bradford New
[v2,6/6] docs/about/deprecated: Document RISC-V "pmu-num" deprecation Support discontinuous PMU counters 1 - - --- 2023-10-11 Rob Bradford New
[v2,5/6] target/riscv: Add "pmu-mask" property to replace "pmu-num" Support discontinuous PMU counters - - - --- 2023-10-11 Rob Bradford New
[v2,4/6] qemu/bitops.h: Add MAKE_32BIT_MASK macro Support discontinuous PMU counters 1 - - --- 2023-10-11 Rob Bradford New
[v2,3/6] target/riscv: Use existing PMU counter mask in FDT generation Support discontinuous PMU counters - 2 - --- 2023-10-11 Rob Bradford New
[v2,2/6] target/riscv: Don't assume PMU counters are continuous Support discontinuous PMU counters - 1 - --- 2023-10-11 Rob Bradford New
[v2,1/6] target/riscv: Propagate error from PMU setup Support discontinuous PMU counters - 2 - --- 2023-10-11 Rob Bradford New
[3/3] target/riscv: Don't assume PMU counters are continuous Support discontinuous PMU counters - 1 - --- 2023-10-03 Rob Bradford New
[2/3] target/riscv: Support discontinuous PMU counters Support discontinuous PMU counters - - - --- 2023-10-03 Rob Bradford New
[1/3] target/riscv: Propagate error from PMU setup Support discontinuous PMU counters - 1 - --- 2023-10-03 Rob Bradford New
target/riscv: Implement WARL behaviour for mcountinhibit/mcounteren target/riscv: Implement WARL behaviour for mcountinhibit/mcounteren 1 1 - --- 2023-08-02 Rob Bradford New
[v2] target/riscv: Fix LMUL check to use VLEN [v2] target/riscv: Fix LMUL check to use VLEN - 1 - --- 2023-07-18 Rob Bradford New
target/riscv: Fix LMUL check to use minimum SEW target/riscv: Fix LMUL check to use minimum SEW - 1 - --- 2023-07-06 Rob Bradford New
[2/2] disas/riscv: Add support for amocas.{w,d,q} instructions [1/2] target/riscv: Add Zacas ISA extension support - - - --- 2023-06-02 Rob Bradford New
[1/2] target/riscv: Add Zacas ISA extension support [1/2] target/riscv: Add Zacas ISA extension support - - - --- 2023-06-02 Rob Bradford New