Show patches with: Series = [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1       |   47 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[PULL,47/47] target/riscv: Use TB_FLAGS_MSTATUS_FS for floating point [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,46/47] target/riscv: Fix mstatus dirty mask [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,45/47] target/riscv: Use both register name and ABI name [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,44/47] riscv: sifive_u: Update model and compatible strings in device tree [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,43/47] riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernet [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,42/47] riscv: sifive_u: Fix broken GEM support [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,41/47] riscv: sifive_u: Instantiate OTP memory with a serial number [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,40/47] riscv: sifive: Implement a model for SiFive FU540 OTP [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,39/47] riscv: roms: Update default bios for sifive_u machine [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,38/47] riscv: sifive_u: Change UART node name in device tree [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,37/47] riscv: sifive_u: Update UART base addresses and IRQs [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 1 2 - --- 2019-09-10 Palmer Dabbelt New
[PULL,36/47] riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,35/47] riscv: sifive_u: Add PRCI block to the SoC [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,34/47] riscv: sifive_u: Generate hfclk and rtcclk nodes [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,33/47] riscv: sifive: Implement PRCI model for FU540 [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,32/47] riscv: sifive_u: Update PLIC hart topology configuration string [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,31/47] riscv: sifive_u: Update hart configuration to reflect the real FU540 SoC [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,30/47] riscv: sifive_u: Set the minimum number of cpus to 2 [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,29/47] riscv: hart: Add a "hartid-base" property to RISC-V hart array [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,28/47] riscv: hart: Extract hart realize to a separate routine [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,27/47] riscv: Add a sifive_cpu.h to include both E and U cpu type defines [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 2 - --- 2019-09-10 Palmer Dabbelt New
[PULL,26/47] riscv: sifive_e: Drop sifive_mmio_emulate() [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,25/47] riscv: sifive_e: prci: Update the PRCI register block size [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 2 - --- 2019-09-10 Palmer Dabbelt New
[PULL,24/47] riscv: sifive_e: prci: Fix a typo of hfxosccfg register programming [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 1 2 - --- 2019-09-10 Palmer Dabbelt New
[PULL,23/47] riscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h} [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 2 - --- 2019-09-10 Palmer Dabbelt New
[PULL,22/47] riscv: sifive_u: Remove the unnecessary include of prci header [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,21/47] riscv: roms: Remove executable attribute of opensbi images [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,20/47] riscv: hw: Remove the unnecessary include of target/riscv/cpu.h [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,19/47] riscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,18/47] riscv: hw: Change create_fdt() to return void [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 3 - --- 2019-09-10 Palmer Dabbelt New
[PULL,17/47] riscv: hw: Remove not needed PLIC properties in device tree [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 2 - --- 2019-09-10 Palmer Dabbelt New
[PULL,16/47] riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,15/47] riscv: hw: Remove superfluous "linux, phandle" property [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,14/47] riscv: hw: Remove duplicated "hw/hw.h" inclusion [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,13/47] riscv: sifive_test: Add reset functionality [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,12/47] riscv: hmp: Add a command to show virtual memory mappings [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 1 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,11/47] riscv: Resolve full path of the given bios image [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,10/47] riscv: Add a helper routine for finding firmware [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,09/47] riscv: rv32: Root page table address can be larger than 32-bit [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,08/47] target/riscv: Update the Hypervisor CSRs to v0.4 [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,07/47] target/riscv: Create function to test if FP is enabled [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 2 - --- 2019-09-10 Palmer Dabbelt New
[PULL,06/47] riscv: plic: Remove unused interrupt functions [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 3 - --- 2019-09-10 Palmer Dabbelt New
[PULL,05/47] target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,04/47] target/riscv/pmp: Restrict priviledged PMP to system-mode emulation [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,03/47] riscv: sifive_u: Fix clock-names property for ethernet node [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL,02/47] riscv: sivive_u: Add dummy serial clock and aliases entry for uart [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - 1 - --- 2019-09-10 Palmer Dabbelt New
[PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1 - - - --- 2019-09-10 Palmer Dabbelt New