Show patches with: Archived = No       |   3700 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[1/3] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-18 Philipp Tomsich Superseded
[2/3] target/riscv: update Zb[abcs] to 1.0.0 (public review) specification target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-18 Philipp Tomsich Superseded
[3/3] disas/riscv: Add Zb[abcs] instructions target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-18 Philipp Tomsich Superseded
[v2,1/3] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-18 Philipp Tomsich Superseded
[v2,2/3] target/riscv: update Zb[abcs] to 1.0.0 (public review) specification target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-18 Philipp Tomsich Superseded
[v2,3/3] disas/riscv: Add Zb[abcs] instructions target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-18 Philipp Tomsich Superseded
[v3,01/15] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,02/15] target/riscv: Reassign instructions to the Zba-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,03/15] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,04/15] target/riscv: Remove the W-form instructions from Zbs target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,05/15] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B) target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,06/15] target/riscv: Reassign instructions to the Zbs-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,07/15] target/riscv: Add instructions of the Zbc-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-23 Philipp Tomsich Superseded
[v3,08/15] target/riscv: Reassign instructions to the Zbb-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,09/15] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,10/15] target/riscv: Add a REQUIRE_32BIT macro target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,11/15] target/riscv: Add rev8 instruction, removing grev/grevi target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,12/15] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,13/15] target/riscv: Remove RVB (replaced by Zb[abcs] target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v3,14/15] target/riscv: rewrite slli.uw implementation to mirror formal spec target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-23 Philipp Tomsich Superseded
[v3,15/15] disas/riscv: Add Zb[abcs] instructions target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-23 Philipp Tomsich Superseded
[v4,01/14] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,02/14] target/riscv: Reassign instructions to the Zba-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,03/14] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,04/14] target/riscv: Remove the W-form instructions from Zbs target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,05/14] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B) target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,06/14] target/riscv: Reassign instructions to the Zbs-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,07/14] target/riscv: Add instructions of the Zbc-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-23 Philipp Tomsich Superseded
[v4,08/14] target/riscv: Reassign instructions to the Zbb-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,09/14] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,10/14] target/riscv: Add a REQUIRE_32BIT macro target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,11/14] target/riscv: Add rev8 instruction, removing grev/grevi target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,12/14] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,13/14] target/riscv: Remove RVB (replaced by Zb[abcs] target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v4,14/14] disas/riscv: Add Zb[abcs] instructions target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-23 Philipp Tomsich Superseded
[v5,01/14] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,02/14] target/riscv: Reassign instructions to the Zba-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,03/14] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,04/14] target/riscv: Remove the W-form instructions from Zbs target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,05/14] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B) target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,06/14] target/riscv: Reassign instructions to the Zbs-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,07/14] target/riscv: Add instructions of the Zbc-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,08/14] target/riscv: Reassign instructions to the Zbb-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,09/14] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,10/14] target/riscv: Add a REQUIRE_32BIT macro target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,11/14] target/riscv: Add rev8 instruction, removing grev/grevi target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,12/14] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,13/14] target/riscv: Remove RVB (replaced by Zb[abcs] target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-23 Philipp Tomsich Superseded
[v5,14/14] disas/riscv: Add Zb[abcs] instructions target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-23 Philipp Tomsich Superseded
[v5,01/14] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,02/14] target/riscv: Reassign instructions to the Zba-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,03/14] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,04/14] target/riscv: Remove the W-form instructions from Zbs target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,05/14] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B) target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,06/14] target/riscv: Reassign instructions to the Zbs-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,07/14] target/riscv: Add instructions of the Zbc-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,08/14] target/riscv: Reassign instructions to the Zbb-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,09/14] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,10/14] target/riscv: Add a REQUIRE_32BIT macro target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,11/14] target/riscv: Add rev8 instruction, removing grev/grevi target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,12/14] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,13/14] target/riscv: Remove RVB (replaced by Zb[abcs] target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v5,14/14] disas/riscv: Add Zb[abcs] instructions target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-25 Philipp Tomsich Superseded
[v6,01/14] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,02/14] target/riscv: Reassign instructions to the Zba-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,03/14] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,04/14] target/riscv: Remove the W-form instructions from Zbs target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,05/14] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B) target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,06/14] target/riscv: Reassign instructions to the Zbs-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,07/14] target/riscv: Add instructions of the Zbc-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,08/14] target/riscv: Reassign instructions to the Zbb-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,09/14] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,10/14] target/riscv: Add a REQUIRE_32BIT macro target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,11/14] target/riscv: Add rev8 instruction, removing grev/grevi target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,12/14] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,13/14] target/riscv: Remove RVB (replaced by Zb[abcs] target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-25 Philipp Tomsich Superseded
[v6,14/14] disas/riscv: Add Zb[abcs] instructions target/riscv: Update QEmu for Zb[abcs] 1.0.0 - - - --- 2021-08-25 Philipp Tomsich Superseded
[v7,01/14] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,02/14] target/riscv: Reassign instructions to the Zba-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,03/14] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,04/14] target/riscv: Remove the W-form instructions from Zbs target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,05/14] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B) target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,06/14] target/riscv: Reassign instructions to the Zbs-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,07/14] target/riscv: Add instructions of the Zbc-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,08/14] target/riscv: Reassign instructions to the Zbb-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,09/14] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,10/14] target/riscv: Add a REQUIRE_32BIT macro target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,11/14] target/riscv: Add rev8 instruction, removing grev/grevi target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,12/14] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,13/14] target/riscv: Remove RVB (replaced by Zb[abcs] target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-08-30 Philipp Tomsich Superseded
[v7,14/14] disas/riscv: Add Zb[abcs] instructions target/riscv: Update QEmu for Zb[abcs] 1.0.0 1 - - --- 2021-08-30 Philipp Tomsich Superseded
[v8,01/14] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-09-03 Philipp Tomsich Superseded
[v8,02/14] target/riscv: Reassign instructions to the Zba-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-09-03 Philipp Tomsich Superseded
[v8,03/14] target/riscv: slli.uw is only a valid encoding if shamt first in 64 bits target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-09-03 Philipp Tomsich Superseded
[v8,04/14] target/riscv: Remove the W-form instructions from Zbs target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-09-03 Philipp Tomsich Superseded
[v8,05/14] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B) target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-09-03 Philipp Tomsich Superseded
[v8,06/14] target/riscv: Reassign instructions to the Zbs-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-09-03 Philipp Tomsich Superseded
[v8,07/14] target/riscv: Add instructions of the Zbc-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-09-03 Philipp Tomsich Superseded
[v8,08/14] target/riscv: Reassign instructions to the Zbb-extension target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 2 - --- 2021-09-03 Philipp Tomsich Superseded
[v8,09/14] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci target/riscv: Update QEmu for Zb[abcs] 1.0.0 - 1 - --- 2021-09-03 Philipp Tomsich Superseded
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