Show patches with: Submitter = Bastian Koppelmann       |    State = Action Required       |   649 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[01/10] tests/tcg/tricore: Bump cpu to tc37x TriCore 1.6.2 insn and bugfixes 1 - - --- 2023-08-26 Bastian Koppelmann New
[01/10] tests/tcg/tricore: Extended and non-extened regs now match TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[01/28] targer/riscv: Activate decodetree and implemnt LUI & AUIPC target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[02/10] hw/tricore: Log failing test in testdevice TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[02/10] target/tricore: Implement CRCN insn TriCore 1.6.2 insn and bugfixes - - - --- 2023-08-26 Bastian Koppelmann New
[02/28] target/riscv: Convert RVXI branch insns to decodetree target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[03/10] target/tricore: Correctly handle FPU RM from PSW TriCore 1.6.2 insn and bugfixes - 1 - --- 2023-08-26 Bastian Koppelmann New
[03/10] tests/tcg: Reset result register after each test TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[03/28] target/riscv: Convert RVXI load/store insns to decodetree Untitled series #30299 - 1 - --- 2018-10-12 Bastian Koppelmann New
[04/10] target/tricore: Implement FTOU insn TriCore 1.6.2 insn and bugfixes - - - --- 2023-08-26 Bastian Koppelmann New
[04/10] tests/tcg/tricore: Add test for all arith insns up to addx TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[04/28] target/riscv: Convert RVXI arithmetic insns to decodetree target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[05/10] target/tricore: Implement ftohp insn TriCore 1.6.2 insn and bugfixes - - - --- 2023-08-26 Bastian Koppelmann New
[05/10] tests/tcg/tricore: Add test for and to csub TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[05/28] target/riscv: Convert RVXI fence insns to decodetree target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[06/10] target/tricore: Implement hptof insn TriCore 1.6.2 insn and bugfixes - - - --- 2023-08-26 Bastian Koppelmann New
[06/10] tests/tcg/tricore: Add from dextr to lt TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[06/28] target/riscv: Convert RVXI csr insns to decodetree target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[07/10] target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 TriCore 1.6.2 insn and bugfixes - 1 - --- 2023-08-26 Bastian Koppelmann New
[07/10] tests/tcg/tricore: Add test from 'max' to 'shas' TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[07/28] target/riscv: Convert RVXM insns to decodetree target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[08/10] target/tricore: Swap src and dst reg for RCRR_INSERT TriCore 1.6.2 insn and bugfixes - - - --- 2023-08-26 Bastian Koppelmann New
[08/10] tests/tcg/tricore: Add test from 'shuffle' to 'xor.t' TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[08/28] target/riscv: Convert RV32A insns to decodetree target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[09/10] target/tricore: Remove CSFRs from cpu.h TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[09/10] target/tricore: Replace cpu_*_code with translator_* TriCore 1.6.2 insn and bugfixes - 1 - --- 2023-08-26 Bastian Koppelmann New
[09/28] target/riscv: Convert RV64A insns to decodetree target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[1/2] target/riscv: Fix FCLASS_D being treated as RV64 only target/riscv: Bugfixes found in decodetree conversion - 2 - --- 2018-11-08 Bastian Koppelmann New
[1/2] target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 == r2 tricore: IMASK/EXTR corner case fixes - 1 - --- 2021-03-05 Bastian Koppelmann New
[1/3] target-tricore: add missing break in insn decode switch stmt - - - --- 2016-03-01 Bastian Koppelmann New
[1/3] target/tricore: Use DisasContextBase API tricore: Convert to translate_loop - 1 - --- 2019-06-17 Bastian Koppelmann New
[1/4] target/tricore: Fix out-of-bounds index in imask instruction TriCore bugfixes - 1 - --- 2023-06-12 Bastian Koppelmann New
[1/4] target/tricore: Introduce priv tb flag TriCore Privilege Levels - 1 - --- 2023-06-14 Bastian Koppelmann New
[1/5] target-tricore: Add trap handling - - - --- 2016-02-11 Bastian Koppelmann New
[1/5] target-tricore: Added FTOUZ instruction - - - --- 2016-10-06 Bastian Koppelmann New
[1/5] target/tricore: Don't save pc in generate_qemu_excp TriCore fixes and gdbstub - - - --- 2019-09-30 Bastian Koppelmann New
[1/5] target/tricore: Fix OPC2_32_RCRW_IMASK translation TriCore instruction bugfixes - 1 - --- 2023-01-27 Bastian Koppelmann New
[1/6] target/tricore: Add semihosting stub TriCore Semihosting - - - --- 2023-10-15 Bastian Koppelmann New
[1/6] target/tricore: Introduce ISA 1.6.2 feature TriCore 1.6.2 Instructions 1 - - --- 2023-06-10 Bastian Koppelmann New
[1/6] tests/tcg/tricore: Move asm tests into 'asm' directory TriCore PCXI/ICR register fixes - - - --- 2023-05-19 Bastian Koppelmann New
[1/7] target-tricore: Add FPU infrastructure - - - --- 2016-03-01 Bastian Koppelmann New
[10/10] target/tricore: Change effective address (ea) to target_ulong TriCore tests and cleanups - - - --- 2023-09-13 Bastian Koppelmann New
[10/10] target/tricore: Fix FTOUZ being ISA v1.3.1 up TriCore 1.6.2 insn and bugfixes - 1 - --- 2023-08-26 Bastian Koppelmann New
[10/28] target/riscv: Convert RV32F insns to decodetree target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[11/28] target/riscv: Convert RV64F insns to decodetree target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[12/28] target/riscv: Convert RV32D insns to decodetree target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[13/28] target/riscv: Convert RV64D insns to decodetree target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[14/28] target/riscv: Convert RV priv insns to decodetree target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[15/28] target/riscv: Convert quadrant 0 of RVXC insns to decodetree target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[16/28] target/riscv: Convert quadrant 1 of RVXC insns to decodetree target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[17/28] target/riscv: Convert quadrant 2 of RVXC insns to decodetree target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[18/28] target/riscv: Remove gen_jalr() target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[19/28] target/riscv: Replace gen_branch() with trans_branch() target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[2/2] target/riscv: Fix sfence.vm/a both available in any priv version target/riscv: Bugfixes found in decodetree conversion - 2 - --- 2018-11-08 Bastian Koppelmann New
[2/2] target/tricore: Fix OPC2_32_RRPW_EXTR for width=0 tricore: IMASK/EXTR corner case fixes - 2 - --- 2021-03-05 Bastian Koppelmann New
[2/3] target-tricore: Fix helper_msub64_q_ssov not reseting OVF bit - - - --- 2016-03-01 Bastian Koppelmann New
[2/3] target-tricore: Make env a member of DisasContext tricore: Convert to translate_loop - 1 - --- 2019-06-17 Bastian Koppelmann New
[2/4] target/tricore: Correctly fix saving PSW.CDE to CSA on call TriCore bugfixes - - - --- 2023-06-12 Bastian Koppelmann New
[2/4] target/tricore: Implement privilege level for all insns TriCore Privilege Levels - 1 - --- 2023-06-14 Bastian Koppelmann New
[2/5] target-tricore: Added MADD.F and MSUB.F instructions - - - --- 2016-10-06 Bastian Koppelmann New
[2/5] target-tricore: Save the pc before CSA operations for exceptions - - - --- 2016-02-11 Bastian Koppelmann New
[2/5] target/tricore: Fix OPC2_32_RCRW_INSERT translation TriCore instruction bugfixes - 1 - --- 2023-01-27 Bastian Koppelmann New
[2/5] target/tricore: Move translate feature check to ctx TriCore fixes and gdbstub - - - --- 2019-09-30 Bastian Koppelmann New
[2/6] target/tricore: Add popcnt.w insn TriCore 1.6.2 Instructions - 1 - --- 2023-06-10 Bastian Koppelmann New
[2/6] target/tricore: Add read and write semihosting calls TriCore Semihosting - - - --- 2023-10-15 Bastian Koppelmann New
[2/6] tests/tcg/tricore: Uses label for memory addresses TriCore PCXI/ICR register fixes - - - --- 2023-05-19 Bastian Koppelmann New
[2/7] target-tricore: Move general CHECK_REG_PAIR of decode_rrr_divide - - - --- 2016-03-01 Bastian Koppelmann New
[20/28] target/riscv: Replace gen_load() with trans_load() target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[21/28] target/riscv: Replace gen_store() with trans_store() target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[22/28] target/riscv: Move gen_arith_imm() decoding into trans_* functions target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[23/28] target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[24/28] target/riscv: Remove shift and slt insn manual decoding target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[25/28] target/riscv: Remove manual decoding of RV32/64M insn target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[26/28] target/riscv: Remove gen_system() target/riscv: Convert to decodetree - 1 - --- 2018-10-12 Bastian Koppelmann New
[27/28] target/riscv: Remove decode_RV32_64G() target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[28/28] target/riscv: Replace gen_exception_illegal with return false target/riscv: Convert to decodetree - - - --- 2018-10-12 Bastian Koppelmann New
[3/3] target-tricore: Fix psw_read() clearing too many bits - - - --- 2016-03-01 Bastian Koppelmann New
[3/3] target/tricore: Use translate_loop tricore: Convert to translate_loop - - - --- 2019-06-17 Bastian Koppelmann New
[3/4] target/tricore: Add CHECK_REG_PAIR() for insn accessing 64 bit regs TriCore bugfixes - - - --- 2023-06-12 Bastian Koppelmann New
[3/4] target/tricore: Honour privilege changes on PSW write TriCore Privilege Levels - - - --- 2023-06-14 Bastian Koppelmann New
[3/5] target-tricore: add context managment trap generation - - - --- 2016-02-11 Bastian Koppelmann New
[3/5] target-tricore: Added new MOV instruction variant - - - --- 2016-10-06 Bastian Koppelmann New
[3/5] target/tricore: Fix RRPW_DEXTR TriCore instruction bugfixes - - - --- 2023-01-27 Bastian Koppelmann New
[3/5] target/tricore: Raise EXCP_DEBUG in gen_goto_tb() for singlestep TriCore fixes and gdbstub - - - --- 2019-09-30 Bastian Koppelmann New
[3/6] target/tricore: Add LHA insn TriCore 1.6.2 Instructions - 1 - --- 2023-06-10 Bastian Koppelmann New
[3/6] target/tricore: Add lseek semihosting call TriCore Semihosting - - - --- 2023-10-15 Bastian Koppelmann New
[3/6] tests/tcg/tricore: Add first C program TriCore PCXI/ICR register fixes - - - --- 2023-05-19 Bastian Koppelmann New
[3/7] target-tricore: add add.f/sub.f instructions - - - --- 2016-03-01 Bastian Koppelmann New
[4/4] target/tricore: Fix helper_ret() not correctly restoring PSW TriCore bugfixes - - - --- 2023-06-12 Bastian Koppelmann New
[4/4] target/tricore: Fix ICR.IE offset in RESTORE insn TriCore Privilege Levels - 1 - --- 2023-06-14 Bastian Koppelmann New
[4/5] target-tricore: add illegal opcode trap generation - - - --- 2016-02-11 Bastian Koppelmann New
[4/5] target-tricore: Added new JNE instruction variant - - - --- 2016-10-06 Bastian Koppelmann New
[4/5] target/tricore: Fix OPC2_32_RRRR_DEXTR TriCore instruction bugfixes - 1 - --- 2023-01-27 Bastian Koppelmann New
[4/5] target/tricore: Implement tricore_cpu_get_phys_page_debug TriCore fixes and gdbstub - - - --- 2019-09-30 Bastian Koppelmann New
[4/6] target/tricore: Add close semihosting call TriCore Semihosting - - - --- 2023-10-15 Bastian Koppelmann New
[4/6] target/tricore: Add crc32l.w insn TriCore 1.6.2 Instructions - 1 - --- 2023-06-10 Bastian Koppelmann New
[4/6] target/tricore: Refactor PCXI/ICR register fields TriCore PCXI/ICR register fixes - - - --- 2023-05-19 Bastian Koppelmann New
[4/7] target-tricore: Add mul.f instruction - - - --- 2016-03-01 Bastian Koppelmann New
[5/5] target-tricore: add opd trap generation - - - --- 2016-02-11 Bastian Koppelmann New
[5/5] target-tricore: Add updfl instruction - - - --- 2016-10-06 Bastian Koppelmann New
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