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[2/5] MAINTAINERS: Add RISC-V IOMMU maintainers

Message ID 06e15a936b62fca4c8bf232e17bb7e040a9cf17e.1689819031.git.tjeznach@rivosinc.com (mailing list archive)
State New, archived
Headers show
Series QEMU RISC-V IOMMU Support | expand

Commit Message

Tomasz Jeznach July 20, 2023, 2:32 a.m. UTC 
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
---
 MAINTAINERS | 6 ++++++
 1 file changed, 6 insertions(+)
diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 43bd9afc19..ed8f65d879 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1971,6 +1971,12 @@  F: include/hw/i2c/ppc4xx_i2c.h
 F: hw/intc/ppc-uic.c
 F: include/hw/intc/ppc-uic.h
 
+RISC-V IOMMU
+M: Tomasz Jeznach <tjeznach@rivosinc.com>
+L: qemu-riscv@nongnu.org
+S: Maintained
+F: hw/riscv/riscv-iommu*
+
 Character devices
 M: Marc-André Lureau <marcandre.lureau@redhat.com>
 R: Paolo Bonzini <pbonzini@redhat.com>