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Tue, 8 Mar 2016 13:03:57 -0800 Received: from [172.19.74.182] (port=56660 helo=xsjalistai50.xlnx.xilinx.com) by xsj-tvapsmtp02 with esmtp (Exim 4.63) (envelope-from ) id 1adOt0-0000eB-SO; Tue, 08 Mar 2016 13:09:46 -0800 From: Alistair Francis To: , Date: Tue, 8 Mar 2016 13:06:46 -0800 Message-ID: <102a10b5ede9a4c8dc06d2f4f81c57c4e2a71a1c.1457470980.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: References: X-RCIS-Action: ALLOW X-TM-AS-MML: disable X-TM-AS-Product-Ver: IMSS-7.1.0.1679-8.0.0.1202-22178.005 X-TM-AS-Result: No--9.872-7.0-31-10 X-imss-scan-details: No--9.872-7.0-31-10 X-TMASE-MatchedRID: MpG/zcNZUvH/uyguzMmOKFz+axQLnAVB5kzxLgNhSikKogmGusPLb5wl aGGOz9d3SYe0ArCcPhjl0ByOo0JQfYdPogR2+s0tA9lly13c/gGH7D1bP/FcOr/A+0D1to6PbCp JOk5WRE8TWPBg+VFf4HWLIuNHn9E4Tirwbf/0Yup1e7Xbb6Im2m3eqxoVjgMEwDR44lliPu35r/ N0c4ndaRytbxuGVtE6+V+tdy2cWjSdsOWs6DEPXriMC5wdwKqdVxZDTO5gDFObKItl61J/yfJvo cwUrWp7ijciq9xw8kUgBwKKRHe+rw5Y4HTgC5dez82z05tagxYB54k0/DGlyPhhfzZis9QkIelM lhx/yUI= X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.96; 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SRVR:BL2NAM02HT090; BCL:0; PCL:0; RULEID:; SRVR:BL2NAM02HT090; X-Forefront-PRVS: 08756AC3C8 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Mar 2016 21:09:48.7871 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.96]; Helo=[xsj-tvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2NAM02HT090 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.38.67 Cc: edgar.iglesias@xilinx.com, alistair.francis@xilinx.com, crosthwaitepeter@gmail.com, edgar.iglesias@gmail.com, alex.bennee@linaro.org, afaerber@suse.de, fred.konrad@greensocs.com Subject: [Qemu-devel] [PATCH v5 07/15] register: Add block initialise helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Peter Crosthwaite Add a helper that will scan a static RegisterAccessInfo Array and populate a container MemoryRegion with registers as defined. Signed-off-by: Peter Crosthwaite Signed-off-by: Alistair Francis --- V3: - Fix typo V2: - Use memory_region_add_subregion_no_print() hw/core/register.c | 39 +++++++++++++++++++++++++++++++++++++++ include/hw/register.h | 20 ++++++++++++++++++++ 2 files changed, 59 insertions(+) diff --git a/hw/core/register.c b/hw/core/register.c index 28f3776..5db8f62 100644 --- a/hw/core/register.c +++ b/hw/core/register.c @@ -228,6 +228,45 @@ uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size) return register_read_memory(opaque, addr, size, false); } +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, + int num, RegisterInfo *ri, uint32_t *data, + MemoryRegion *container, const MemoryRegionOps *ops, + bool debug_enabled, uint64_t memory_size) +{ + const char *device_prefix = object_get_typename(OBJECT(owner)); + RegisterInfoArray *r_array = g_malloc(sizeof(RegisterInfoArray)); + int i; + + r_array->num_elements = 0; + r_array->r = g_malloc_n(num, sizeof(RegisterInfo *)); + + for (i = 0; i < num; i++) { + int index = rae[i].decode.addr / 4; + RegisterInfo *r = &ri[index]; + + *r = (RegisterInfo) { + .data = &data[index], + .data_size = sizeof(uint32_t), + .access = &rae[i], + .debug = debug_enabled, + .prefix = device_prefix, + .opaque = owner, + }; + register_init(r); + + r_array->r[r_array->num_elements] = r; + r_array->num_elements++; + } + + r_array->num_elements--; + + memory_region_init_io(&r_array->mem, OBJECT(owner), ops, r_array, + device_prefix, memory_size); + memory_region_add_subregion(container, + r_array->r[0]->access->decode.addr, + &r_array->mem); +} + static const TypeInfo register_info = { .name = TYPE_REGISTER, .parent = TYPE_DEVICE, diff --git a/include/hw/register.h b/include/hw/register.h index d732f55..00df7d5 100644 --- a/include/hw/register.h +++ b/include/hw/register.h @@ -176,6 +176,26 @@ void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value, uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size); uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size); +/** + * Init a block of consecutive registers into a container MemoryRegion. A + * number of constant register definitions are parsed to create a corresponding + * array of RegisterInfo's. + * + * @owner: device owning the registers + * @rae: Register definitions to init + * @num: number of registers to init (length of @rae) + * @ri: Register array to init + * @data: Array to use for register data + * @container: Memory region to contain new registers + * @ops: Memory region ops to access registers. + * @debug enabled: turn on/off verbose debug information + */ + +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, + int num, RegisterInfo *ri, uint32_t *data, + MemoryRegion *container, const MemoryRegionOps *ops, + bool debug_enabled, uint64_t memory_size); + /* Define constants for a 32 bit register */ #define REG32(reg, addr) \ enum { A_ ## reg = (addr) }; \