diff mbox

[V4,4/4] hw/pci-host: Emulate AMD IO MMU

Message ID 1453130745-25793-5-git-send-email-davidkiarie4@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

David Kiarie Jan. 18, 2016, 3:25 p.m. UTC 
Support AMD IO MMU emulation in q35 and piix chipsets

Signed-off-by: David Kiarie <davidkiarie4@gmail.com>
---
 hw/pci-host/piix.c | 11 +++++++++++
 hw/pci-host/q35.c  | 14 ++++++++++++--
 2 files changed, 23 insertions(+), 2 deletions(-)

Comments

Marcel Apfelbaum Feb. 14, 2016, 1:02 p.m. UTC | #1 
On 01/18/2016 05:25 PM, David Kiarie wrote:
> Support AMD IO MMU emulation in q35 and piix chipsets
>
> Signed-off-by: David Kiarie <davidkiarie4@gmail.com>
> ---
>   hw/pci-host/piix.c | 11 +++++++++++
>   hw/pci-host/q35.c  | 14 ++++++++++++--
>   2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> index b0d7e31..3ba245d 100644
> --- a/hw/pci-host/piix.c
> +++ b/hw/pci-host/piix.c
> @@ -35,6 +35,7 @@
>   #include "hw/i386/ioapic.h"
>   #include "qapi/visitor.h"
>   #include "qemu/error-report.h"
> +#include "hw/i386/amd_iommu.h"
>
>   /*
>    * I440FX chipset data sheet.
> @@ -297,6 +298,16 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp)
>
>       sysbus_add_io(sbd, 0xcfc, &s->data_mem);
>       sysbus_init_ioports(sbd, 0xcfc, 4);
> +
> +    /* AMD IOMMU (AMD-Vi) */
> +    if (g_strcmp0(object_property_get_str(qdev_get_machine(), "iommu", NULL),
> +                  "amd") == 0) {

Hi,

Minor comments, here you can use the same qdev_get_machine())->iommu as used below
and the same AMD_IOMMU_STR instead of "amd".

Do I understand correctly that we can have an AMD IOMMU working on an i440fx machine (non PCI Express)?

Thanks,
Marcel

> +        AMDIOMMUState *iommu_state;
> +        PCIDevice *iommu;
> +        iommu = pci_create_simple(s->bus, 0x20, TYPE_AMD_IOMMU_DEVICE);
> +        iommu_state = AMD_IOMMU_DEVICE(iommu);
> +        pci_setup_iommu(s->bus, bridge_host_amd_iommu, iommu_state);
> +    }
>   }
>
>   static void i440fx_realize(PCIDevice *dev, Error **errp)
> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
> index 1fb4707..0c60e3c 100644
> --- a/hw/pci-host/q35.c
> +++ b/hw/pci-host/q35.c
> @@ -30,6 +30,7 @@
>   #include "hw/hw.h"
>   #include "hw/pci-host/q35.h"
>   #include "qapi/visitor.h"
> +#include "hw/i386/amd_iommu.h"
>
>   /****************************************************************************
>    * Q35 host
> @@ -505,9 +506,18 @@ static void mch_realize(PCIDevice *d, Error **errp)
>                    mch->pci_address_space, &mch->pam_regions[i+1],
>                    PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);
>       }
> -    /* Intel IOMMU (VT-d) */
> -    if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) {
> +
> +    if (g_strcmp0(MACHINE(qdev_get_machine())->iommu, INTEL_IOMMU_STR) == 0) {
> +        /* Intel IOMMU (VT-d) */
>           mch_init_dmar(mch);
> +    } else if (g_strcmp0(MACHINE(qdev_get_machine())->iommu, AMD_IOMMU_STR)
> +               == 0) {
> +        AMDIOMMUState *iommu_state;
> +        PCIDevice *iommu;
> +        PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch)));
> +        iommu = pci_create_simple(bus, 0x20, TYPE_AMD_IOMMU_DEVICE);
> +        iommu_state = AMD_IOMMU_DEVICE(iommu);
> +        pci_setup_iommu(bus, bridge_host_amd_iommu, iommu_state);
>       }
>   }
>
>
David Kiarie Feb. 14, 2016, 6:06 p.m. UTC | #2 
On Sun, Feb 14, 2016 at 4:02 PM, Marcel Apfelbaum
<marcel.apfelbaum@gmail.com> wrote:
> On 01/18/2016 05:25 PM, David Kiarie wrote:
>>
>> Support AMD IO MMU emulation in q35 and piix chipsets
>>
>> Signed-off-by: David Kiarie <davidkiarie4@gmail.com>
>> ---
>>   hw/pci-host/piix.c | 11 +++++++++++
>>   hw/pci-host/q35.c  | 14 ++++++++++++--
>>   2 files changed, 23 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
>> index b0d7e31..3ba245d 100644
>> --- a/hw/pci-host/piix.c
>> +++ b/hw/pci-host/piix.c
>> @@ -35,6 +35,7 @@
>>   #include "hw/i386/ioapic.h"
>>   #include "qapi/visitor.h"
>>   #include "qemu/error-report.h"
>> +#include "hw/i386/amd_iommu.h"
>>
>>   /*
>>    * I440FX chipset data sheet.
>> @@ -297,6 +298,16 @@ static void i440fx_pcihost_realize(DeviceState *dev,
>> Error **errp)
>>
>>       sysbus_add_io(sbd, 0xcfc, &s->data_mem);
>>       sysbus_init_ioports(sbd, 0xcfc, 4);
>> +
>> +    /* AMD IOMMU (AMD-Vi) */
>> +    if (g_strcmp0(object_property_get_str(qdev_get_machine(), "iommu",
>> NULL),
>> +                  "amd") == 0) {
>
>
> Hi,
>
> Minor comments, here you can use the same qdev_get_machine())->iommu as used
> below
> and the same AMD_IOMMU_STR instead of "amd".
>
> Do I understand correctly that we can have an AMD IOMMU working on an i440fx
> machine (non PCI Express)?

Well, we could say, it worked - then because I didn't have any
interrupts yet but I wont work anymore since am going to add an
interrupt with event logging.

Will resend, as soon as possible.

>
> Thanks,
> Marcel
>
>
>> +        AMDIOMMUState *iommu_state;
>> +        PCIDevice *iommu;
>> +        iommu = pci_create_simple(s->bus, 0x20, TYPE_AMD_IOMMU_DEVICE);
>> +        iommu_state = AMD_IOMMU_DEVICE(iommu);
>> +        pci_setup_iommu(s->bus, bridge_host_amd_iommu, iommu_state);
>> +    }
>>   }
>>
>>   static void i440fx_realize(PCIDevice *dev, Error **errp)
>> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
>> index 1fb4707..0c60e3c 100644
>> --- a/hw/pci-host/q35.c
>> +++ b/hw/pci-host/q35.c
>> @@ -30,6 +30,7 @@
>>   #include "hw/hw.h"
>>   #include "hw/pci-host/q35.h"
>>   #include "qapi/visitor.h"
>> +#include "hw/i386/amd_iommu.h"
>>
>>
>> /****************************************************************************
>>    * Q35 host
>> @@ -505,9 +506,18 @@ static void mch_realize(PCIDevice *d, Error **errp)
>>                    mch->pci_address_space, &mch->pam_regions[i+1],
>>                    PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);
>>       }
>> -    /* Intel IOMMU (VT-d) */
>> -    if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) {
>> +
>> +    if (g_strcmp0(MACHINE(qdev_get_machine())->iommu, INTEL_IOMMU_STR) ==
>> 0) {
>> +        /* Intel IOMMU (VT-d) */
>>           mch_init_dmar(mch);
>> +    } else if (g_strcmp0(MACHINE(qdev_get_machine())->iommu,
>> AMD_IOMMU_STR)
>> +               == 0) {
>> +        AMDIOMMUState *iommu_state;
>> +        PCIDevice *iommu;
>> +        PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch)));
>> +        iommu = pci_create_simple(bus, 0x20, TYPE_AMD_IOMMU_DEVICE);
>> +        iommu_state = AMD_IOMMU_DEVICE(iommu);
>> +        pci_setup_iommu(bus, bridge_host_amd_iommu, iommu_state);
>>       }
>>   }
>>
>>
>
diff mbox

Patch

diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index b0d7e31..3ba245d 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -35,6 +35,7 @@ 
 #include "hw/i386/ioapic.h"
 #include "qapi/visitor.h"
 #include "qemu/error-report.h"
+#include "hw/i386/amd_iommu.h"
 
 /*
  * I440FX chipset data sheet.
@@ -297,6 +298,16 @@  static void i440fx_pcihost_realize(DeviceState *dev, Error **errp)
 
     sysbus_add_io(sbd, 0xcfc, &s->data_mem);
     sysbus_init_ioports(sbd, 0xcfc, 4);
+
+    /* AMD IOMMU (AMD-Vi) */
+    if (g_strcmp0(object_property_get_str(qdev_get_machine(), "iommu", NULL),
+                  "amd") == 0) {
+        AMDIOMMUState *iommu_state;
+        PCIDevice *iommu;
+        iommu = pci_create_simple(s->bus, 0x20, TYPE_AMD_IOMMU_DEVICE);
+        iommu_state = AMD_IOMMU_DEVICE(iommu);
+        pci_setup_iommu(s->bus, bridge_host_amd_iommu, iommu_state);
+    }
 }
 
 static void i440fx_realize(PCIDevice *dev, Error **errp)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 1fb4707..0c60e3c 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -30,6 +30,7 @@ 
 #include "hw/hw.h"
 #include "hw/pci-host/q35.h"
 #include "qapi/visitor.h"
+#include "hw/i386/amd_iommu.h"
 
 /****************************************************************************
  * Q35 host
@@ -505,9 +506,18 @@  static void mch_realize(PCIDevice *d, Error **errp)
                  mch->pci_address_space, &mch->pam_regions[i+1],
                  PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);
     }
-    /* Intel IOMMU (VT-d) */
-    if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) {
+
+    if (g_strcmp0(MACHINE(qdev_get_machine())->iommu, INTEL_IOMMU_STR) == 0) {
+        /* Intel IOMMU (VT-d) */
         mch_init_dmar(mch);
+    } else if (g_strcmp0(MACHINE(qdev_get_machine())->iommu, AMD_IOMMU_STR)
+               == 0) {
+        AMDIOMMUState *iommu_state;
+        PCIDevice *iommu;
+        PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch)));
+        iommu = pci_create_simple(bus, 0x20, TYPE_AMD_IOMMU_DEVICE);
+        iommu_state = AMD_IOMMU_DEVICE(iommu);
+        pci_setup_iommu(bus, bridge_host_amd_iommu, iommu_state);
     }
 }