@@ -6575,11 +6575,13 @@ typedef enum {
* @startlevel: Suggested starting level
* @inputsize: Bitsize of IPAs
* @stride: Page-table stride (See the ARM ARM)
+ * @pamax: Implementation defined bit-width of physical addresses
*
* Returns true if the suggested starting level is OK and false otherwise.
*/
static bool check_s2_startlevel(ARMCPU *cpu, bool is_aa64, int level,
- int inputsize, int stride)
+ int inputsize, int stride,
+ unsigned int pamax)
{
const int grainsize = stride + 3;
int startsizecheck;
@@ -6595,8 +6597,6 @@ static bool check_s2_startlevel(ARMCPU *cpu, bool is_aa64, int level,
}
if (is_aa64) {
- unsigned int pamax = arm_pamax(cpu);
-
switch (stride) {
case 13: /* 64KB Pages. */
if (level == 0 || (level == 1 && pamax <= 42)) {
@@ -6808,6 +6808,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
* VTCR_EL2.SL0 field (whose interpretation depends on the page size)
*/
int startlevel = extract32(tcr->raw_tcr, 6, 2);
+ unsigned int pamax = arm_pamax(cpu);
bool ok;
if (va_size == 32 || stride == 9) {
@@ -6820,7 +6821,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
/* Check that the starting level is valid. */
ok = check_s2_startlevel(cpu, va_size == 64, level,
- inputsize, stride);
+ inputsize, stride, pamax);
if (!ok) {
/* AArch64 reports these as level 0 faults.
* AArch32 reports these as level 1 faults.