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Wed, 27 Jan 2016 10:56:45 +0800 (CST) From: xiaoqiang zhao To: qemu-devel@nongnu.org Date: Wed, 27 Jan 2016 10:54:41 +0800 Message-Id: <1453863283-7562-8-git-send-email-zxq_yx_007@163.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1453863283-7562-1-git-send-email-zxq_yx_007@163.com> References: <1453863283-7562-1-git-send-email-zxq_yx_007@163.com> X-CM-TRANSID: EsCowECZxFTKMahWzrGhAA--.213S9 X-Coremail-Antispam: 1Uf129KBjvJXoW7Cr1rJr4UAr45Zr4UZw1UWrg_yoW8ZF13pa yxuF17Gr48JrsrXr4fArn7GF98tr1kAr1kGryxJws2vF1Iyw18tF4DA3yavF4akFWv9FW3 ArWfXF1rAw45Gr7anT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07UorWwUUUUU= X-Originating-IP: [118.187.28.42] X-CM-SenderInfo: 520ts5t0bqili6rwjhhfrp/1tbiFg38xlWBO4RPiQABsN X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 220.181.12.18 Cc: xiaoqiang zhao , peter.maydell@linaro.org, afaerber@suse.de Subject: [Qemu-devel] [PATCH v2 07/14] hw/timer: QOM'ify lm32_timer X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP * split lm32_timer_init into lm32_timer_info.instance_init and lm32_timer_realize * use DeviceClass::realize instead of SysBusDeviceClass::init Signed-off-by: xiaoqiang zhao Reviewed-by: Peter Maydell --- hw/timer/lm32_timer.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c index d2ab1e7..4ee080a 100644 --- a/hw/timer/lm32_timer.c +++ b/hw/timer/lm32_timer.c @@ -175,21 +175,26 @@ static void timer_reset(DeviceState *d) ptimer_stop(s->ptimer); } -static int lm32_timer_init(SysBusDevice *dev) +static void lm32_timer_init(Object *obj) { - LM32TimerState *s = LM32_TIMER(dev); + LM32TimerState *s = LM32_TIMER(obj); + SysBusDevice *dev = SYS_BUS_DEVICE(obj); sysbus_init_irq(dev, &s->irq); s->bh = qemu_bh_new(timer_hit, s); s->ptimer = ptimer_init(s->bh); - ptimer_set_freq(s->ptimer, s->freq_hz); memory_region_init_io(&s->iomem, OBJECT(s), &timer_ops, s, "timer", R_MAX * 4); sysbus_init_mmio(dev, &s->iomem); +} - return 0; +static void lm32_timer_realize(DeviceState *dev, Error **errp) +{ + LM32TimerState *s = LM32_TIMER(dev); + + ptimer_set_freq(s->ptimer, s->freq_hz); } static const VMStateDescription vmstate_lm32_timer = { @@ -212,9 +217,8 @@ static Property lm32_timer_properties[] = { static void lm32_timer_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = lm32_timer_init; + dc->realize = lm32_timer_realize; dc->reset = timer_reset; dc->vmsd = &vmstate_lm32_timer; dc->props = lm32_timer_properties; @@ -224,6 +228,7 @@ static const TypeInfo lm32_timer_info = { .name = TYPE_LM32_TIMER, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(LM32TimerState), + .instance_init = lm32_timer_init, .class_init = lm32_timer_class_init, };