From patchwork Wed Jan 27 10:13:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 8132111 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 91D789F9A0 for ; Wed, 27 Jan 2016 10:12:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EB983202EB for ; Wed, 27 Jan 2016 10:12:44 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 73CDB2026D for ; Wed, 27 Jan 2016 10:12:39 +0000 (UTC) Received: from localhost ([::1]:48919 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aON5a-0001IO-Hi for patchwork-qemu-devel@patchwork.kernel.org; Wed, 27 Jan 2016 05:12:38 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59601) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aON5M-0001Hl-Kr for qemu-devel@nongnu.org; Wed, 27 Jan 2016 05:12:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aON5L-0005P4-FU for qemu-devel@nongnu.org; Wed, 27 Jan 2016 05:12:24 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:33183) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aON5L-0005OP-50; Wed, 27 Jan 2016 05:12:23 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 85E39140BF9; Wed, 27 Jan 2016 21:12:19 +1100 (AEDT) From: David Gibson To: benh@kernel.crashing.org Date: Wed, 27 Jan 2016 21:13:08 +1100 Message-Id: <1453889591-30968-8-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1453889591-30968-1-git-send-email-david@gibson.dropbear.id.au> References: <1453889591-30968-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2401:3900:2:1::2 Cc: lvivier@redhat.com, thuth@redhat.com, aik@ozlabs.ru, agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, David Gibson Subject: [Qemu-devel] [PATCHv2 07/10] target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently both the tlbiva instruction (used on 44x chips) and the tlbie instruction (used on hash MMU chips) are both handled via ppc_tlb_invalidate_one(). This is silly, because they're invoked from different places, and do different things. Clean this up by separating out the tlbiva instruction into its own handling. In fact the implementation is only a stub anyway. Signed-off-by: David Gibson Reviewed-by: Laurent Vivier Acked-by: Benjamin Herrenschmidt --- target-ppc/helper.h | 1 + target-ppc/mmu_helper.c | 14 ++++++++++---- target-ppc/translate.c | 2 +- 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 869be15..e5a8f7b 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -544,6 +544,7 @@ DEF_HELPER_2(74xx_tlbd, void, env, tl) DEF_HELPER_2(74xx_tlbi, void, env, tl) DEF_HELPER_FLAGS_1(tlbia, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_2(tlbie, TCG_CALL_NO_RWG, void, env, tl) +DEF_HELPER_FLAGS_2(tlbiva, TCG_CALL_NO_RWG, void, env, tl) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_3(store_slb, TCG_CALL_NO_RWG, void, env, tl, tl) DEF_HELPER_2(load_slb_esid, tl, env, tl) diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c index 82ebe5d..e9e0edb 100644 --- a/target-ppc/mmu_helper.c +++ b/target-ppc/mmu_helper.c @@ -1971,10 +1971,6 @@ void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr) ppc6xx_tlb_invalidate_virt(env, addr, 1); } break; - case POWERPC_MMU_BOOKE: - /* XXX: TODO */ - cpu_abort(CPU(cpu), "BookE MMU model is not implemented\n"); - break; case POWERPC_MMU_32B: case POWERPC_MMU_601: /* tlbie invalidate TLBs for all segments */ @@ -2116,6 +2112,16 @@ void helper_tlbie(CPUPPCState *env, target_ulong addr) ppc_tlb_invalidate_one(env, addr); } +void helper_tlbiva(CPUPPCState *env, target_ulong addr) +{ + PowerPCCPU *cpu = ppc_env_get_cpu(env); + + /* tlbiva instruciton only exists on BookE */ + assert(env->mmu_model == POWERPC_MMU_BOOKE); + /* XXX: TODO */ + cpu_abort(CPU(cpu), "BookE MMU model is not implemented\n"); +} + /* Software driven TLBs management */ /* PowerPC 602/603 software TLB load instructions helpers */ static void do_6xx_tlb(CPUPPCState *env, target_ulong new_EPN, int is_code) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 4be7eaa..a05a169 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -5904,7 +5904,7 @@ static void gen_tlbiva(DisasContext *ctx) } t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); - gen_helper_tlbie(cpu_env, cpu_gpr[rB(ctx->opcode)]); + gen_helper_tlbiva(cpu_env, cpu_gpr[rB(ctx->opcode)]); tcg_temp_free(t0); #endif }