From patchwork Wed Feb 3 20:32:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: John Snow X-Patchwork-Id: 8208771 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BCF459FB33 for ; Wed, 3 Feb 2016 20:36:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0363F202D1 for ; Wed, 3 Feb 2016 20:36:39 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 10C5920279 for ; Wed, 3 Feb 2016 20:36:38 +0000 (UTC) Received: from localhost ([::1]:37561 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aR4AH-0005YA-Dc for patchwork-qemu-devel@patchwork.kernel.org; Wed, 03 Feb 2016 15:36:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35544) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aR46U-0006fX-Im for qemu-devel@nongnu.org; Wed, 03 Feb 2016 15:32:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aR46T-0005ck-7N for qemu-devel@nongnu.org; Wed, 03 Feb 2016 15:32:42 -0500 Received: from mx1.redhat.com ([209.132.183.28]:36122) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aR46S-0005cc-WB for qemu-devel@nongnu.org; Wed, 03 Feb 2016 15:32:41 -0500 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (Postfix) with ESMTPS id 9C2C3C0023B2; Wed, 3 Feb 2016 20:32:40 +0000 (UTC) Received: from scv.usersys.redhat.com (vpn-49-112.rdu2.redhat.com [10.10.49.112]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u13KWZEj032297; Wed, 3 Feb 2016 15:32:40 -0500 From: John Snow To: qemu-devel@nongnu.org Date: Wed, 3 Feb 2016 15:32:22 -0500 Message-Id: <1454531555-32022-8-git-send-email-jsnow@redhat.com> In-Reply-To: <1454531555-32022-1-git-send-email-jsnow@redhat.com> References: <1454531555-32022-1-git-send-email-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: peter.maydell@linaro.org, jsnow@redhat.com, =?UTF-8?q?Herv=C3=A9=20Poussineau?= Subject: [Qemu-devel] [PULL 07/20] i8257: make the DMA running method per controller X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hervé Poussineau This removes some static/global variables, and we're now running only the required controller (master or slave) Signed-off-by: Hervé Poussineau Message-id: 1453843944-26833-7-git-send-email-hpoussin@reactos.org Signed-off-by: John Snow --- hw/dma/i8257.c | 75 ++++++++++++++++++++++++++-------------------------------- 1 file changed, 34 insertions(+), 41 deletions(-) diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index e4262be..e577ed4 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -62,6 +62,10 @@ typedef struct I8257State { I8257Regs regs[4]; MemoryRegion channel_io; MemoryRegion cont_io; + + QEMUBH *dma_bh; + bool dma_bh_scheduled; + int running; } I8257State; static I8257State dma_controllers[2]; @@ -81,7 +85,7 @@ enum { }; -static void i8257_dma_run(void); +static void i8257_dma_run(void *opaque); static int channels[8] = {-1, 2, 3, 1, -1, -1, -1, 0}; @@ -221,7 +225,7 @@ static void i8257_write_cont(void *opaque, hwaddr nport, uint64_t data, d->status &= ~(1 << (ichan + 4)); } d->status &= ~(1 << ichan); - i8257_dma_run(); + i8257_dma_run(d); break; case 0x02: /* single mask */ @@ -229,7 +233,7 @@ static void i8257_write_cont(void *opaque, hwaddr nport, uint64_t data, d->mask |= 1 << (data & 3); else d->mask &= ~(1 << (data & 3)); - i8257_dma_run(); + i8257_dma_run(d); break; case 0x03: /* mode */ @@ -264,12 +268,12 @@ static void i8257_write_cont(void *opaque, hwaddr nport, uint64_t data, case 0x06: /* clear mask for all channels */ d->mask = 0; - i8257_dma_run(); + i8257_dma_run(d); break; case 0x07: /* write mask for all channels */ d->mask = data; - i8257_dma_run(); + i8257_dma_run(d); break; default: @@ -321,7 +325,7 @@ void DMA_hold_DREQ (int nchan) ichan = nchan & 3; linfo ("held cont=%d chan=%d\n", ncont, ichan); dma_controllers[ncont].status |= 1 << (ichan + 4); - i8257_dma_run(); + i8257_dma_run(&dma_controllers[ncont]); } void DMA_release_DREQ (int nchan) @@ -332,13 +336,14 @@ void DMA_release_DREQ (int nchan) ichan = nchan & 3; linfo ("released cont=%d chan=%d\n", ncont, ichan); dma_controllers[ncont].status &= ~(1 << (ichan + 4)); - i8257_dma_run(); + i8257_dma_run(&dma_controllers[ncont]); } -static void i8257_channel_run(int ncont, int ichan) +static void i8257_channel_run(I8257State *d, int ichan) { + int ncont = d->dshift; int n; - I8257Regs *r = &dma_controllers[ncont].regs[ichan]; + I8257Regs *r = &d->regs[ichan]; #ifdef DEBUG_DMA int dir, opmode; @@ -359,52 +364,38 @@ static void i8257_channel_run(int ncont, int ichan) ldebug ("dma_pos %d size %d\n", n, (r->base[COUNT] + 1) << ncont); } -static QEMUBH *dma_bh; -static bool dma_bh_scheduled; - -static void i8257_dma_run(void) +static void i8257_dma_run(void *opaque) { - I8257State *d; - int icont, ichan; + I8257State *d = opaque; + int ichan; int rearm = 0; - static int running = 0; - if (running) { + if (d->running) { rearm = 1; goto out; } else { - running = 1; + d->running = 1; } - d = dma_controllers; + for (ichan = 0; ichan < 4; ichan++) { + int mask; - for (icont = 0; icont < 2; icont++, d++) { - for (ichan = 0; ichan < 4; ichan++) { - int mask; + mask = 1 << ichan; - mask = 1 << ichan; - - if ((0 == (d->mask & mask)) && (0 != (d->status & (mask << 4)))) { - i8257_channel_run(icont, ichan); - rearm = 1; - } + if ((0 == (d->mask & mask)) && (0 != (d->status & (mask << 4)))) { + i8257_channel_run(d, ichan); + rearm = 1; } } - running = 0; + d->running = 0; out: if (rearm) { - qemu_bh_schedule_idle(dma_bh); - dma_bh_scheduled = true; + qemu_bh_schedule_idle(d->dma_bh); + d->dma_bh_scheduled = true; } } -static void i8257_dma_run_bh(void *unused) -{ - dma_bh_scheduled = false; - i8257_dma_run(); -} - void DMA_register_channel (int nchan, DMA_transfer_handler transfer_handler, void *opaque) @@ -469,7 +460,8 @@ int DMA_write_memory (int nchan, void *buf, int pos, int len) */ void DMA_schedule(void) { - if (dma_bh_scheduled) { + if (dma_controllers[0].dma_bh_scheduled || + dma_controllers[1].dma_bh_scheduled) { qemu_notify_event(); } } @@ -552,6 +544,8 @@ static void dma_init2(I8257State *d, int base, int dshift, for (i = 0; i < ARRAY_SIZE (d->regs); ++i) { d->regs[i].transfer_handler = i8257_phony_handler; } + + d->dma_bh = qemu_bh_new(i8257_dma_run, d); } static const VMStateDescription vmstate_i8257_regs = { @@ -572,7 +566,8 @@ static const VMStateDescription vmstate_i8257_regs = { static int i8257_post_load(void *opaque, int version_id) { - i8257_dma_run(); + I8257State *d = opaque; + i8257_dma_run(d); return 0; } @@ -599,6 +594,4 @@ void DMA_init(ISABus *bus, int high_page_enable) dma_init2(&dma_controllers[1], 0xc0, 1, 0x88, high_page_enable ? 0x488 : -1); vmstate_register (NULL, 0, &vmstate_dma, &dma_controllers[0]); vmstate_register (NULL, 1, &vmstate_dma, &dma_controllers[1]); - - dma_bh = qemu_bh_new(i8257_dma_run_bh, NULL); }