diff mbox

[v2,04/11] block: m25p80: Extend address mode

Message ID 1454588606-14094-5-git-send-email-marcin.krzeminski@nokia.com (mailing list archive)
State New, archived
Headers show

Commit Message

marcin.krzeminski@nokia.com Feb. 4, 2016, 12:23 p.m. UTC 
From: Marcin Krzeminski <marcin.krzeminski@nokia.com>

Extend address mode allows to switch flash 16 MiB banks,
allowing user to access all flash sectors.
This access mode is used by u-boot.

Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
---
 hw/block/m25p80.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

Comments

Cédric Le Goater Feb. 5, 2016, 7:58 a.m. UTC | #1 
On 02/04/2016 01:23 PM, marcin.krzeminski@nokia.com wrote:
> From: Marcin Krzeminski <marcin.krzeminski@nokia.com>
> 
> Extend address mode allows to switch flash 16 MiB banks,
> allowing user to access all flash sectors.
> This access mode is used by u-boot.
> 
> Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com>
> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
> ---
>  hw/block/m25p80.c | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
> index f9088c5..6b5f00d 100644
> --- a/hw/block/m25p80.c
> +++ b/hw/block/m25p80.c
> @@ -48,6 +48,9 @@
>   */
>  #define WR_1 0x100
> 
> +/* 16 MiB max in 3 byte address mode */
> +#define MAX_3BYTES_SIZE 0x1000000
> +
>  typedef struct FlashPartInfo {
>      const char *part_name;
>      /* jedec code. (jedec >> 16) & 0xff is the 1st byte, >> 8 the 2nd etc */
> @@ -234,6 +237,9 @@ typedef enum {
>      ERASE_32K = 0x52,
>      ERASE_SECTOR = 0xd8,
> 
> +    EXTEND_ADDR_READ = 0xC8,
> +    EXTEND_ADDR_WRITE = 0xC5,
> +
>      RESET_ENABLE = 0x66,
>      RESET_MEMORY = 0x99,
>  } FlashCMD;
> @@ -264,6 +270,7 @@ typedef struct Flash {
>      uint64_t cur_addr;
>      bool write_enable;
>      bool reset_enable;
> +    uint8_t ear;
> 
>      int64_t dirty_page;
> 
> @@ -404,6 +411,7 @@ static void complete_collecting_data(Flash *s)
>      s->cur_addr = s->data[0] << 16;
>      s->cur_addr |= s->data[1] << 8;
>      s->cur_addr |= s->data[2];
> +        s->cur_addr += (s->ear & 0x3) * MAX_3BYTES_SIZE;

here ^

and this line does not appear in patch 5 which is curious. Is that a refresh 
issue ? 

Thanks,

C.

> 
>      s->state = STATE_IDLE;
> 
> @@ -431,6 +439,9 @@ static void complete_collecting_data(Flash *s)
>              s->write_enable = false;
>          }
>          break;
> +    case EXTEND_ADDR_WRITE:
> +        s->ear = s->data[0];
> +        break;
>      default:
>          break;
>      }
> @@ -440,6 +451,7 @@ static void reset_memory(Flash *s)
>  {
>      s->cmd_in_progress = NOP;
>      s->cur_addr = 0;
> +    s->ear = 0;
>      s->len = 0;
>      s->needed_bytes = 0;
>      s->pos = 0;
> @@ -563,6 +575,20 @@ static void decode_new_cmd(Flash *s, uint32_t value)
>          break;
>      case NOP:
>          break;
> +    case EXTEND_ADDR_READ:
> +        s->data[0] = s->ear;
> +        s->pos = 0;
> +        s->len = 1;
> +        s->state = STATE_READING_DATA;
> +        break;
> +    case EXTEND_ADDR_WRITE:
> +        if (s->write_enable) {
> +            s->needed_bytes = 1;
> +            s->pos = 0;
> +            s->len = 0;
> +            s->state = STATE_COLLECTING_DATA;
> +        }
> +        break;
>      case RESET_ENABLE:
>          s->reset_enable = true;
>          break;
> @@ -699,6 +725,7 @@ static const VMStateDescription vmstate_m25p80 = {
>          VMSTATE_UINT8(cmd_in_progress, Flash),
>          VMSTATE_UINT64(cur_addr, Flash),
>          VMSTATE_BOOL(write_enable, Flash),
> +        VMSTATE_UINT8(ear, Flash),
>          VMSTATE_BOOL(reset_enable, Flash),
>          VMSTATE_END_OF_LIST()
>      }
>
marcin.krzeminski@nokia.com Feb. 5, 2016, 10:11 a.m. UTC | #2 
> -----Original Message-----
> From: EXT Cédric Le Goater [mailto:clg@fr.ibm.com]
> Sent: Friday, February 05, 2016 8:58 AM
> To: Krzeminski, Marcin (Nokia - PL/Wroclaw); qemu-devel@nongnu.org
> Cc: crosthwaitepeter@gmail.com; pawel.lenkow@itlen.com
> Subject: Re: [PATCH v2 04/11] block: m25p80: Extend address mode
> 
> On 02/04/2016 01:23 PM, marcin.krzeminski@nokia.com wrote:
> > From: Marcin Krzeminski <marcin.krzeminski@nokia.com>
> >
> > Extend address mode allows to switch flash 16 MiB banks, allowing user
> > to access all flash sectors.
> > This access mode is used by u-boot.
> >
> > Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com>
> > Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
> > ---
> >  hw/block/m25p80.c | 27 +++++++++++++++++++++++++++
> >  1 file changed, 27 insertions(+)
> >
> > diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index
> > f9088c5..6b5f00d 100644
> > --- a/hw/block/m25p80.c
> > +++ b/hw/block/m25p80.c
> > @@ -48,6 +48,9 @@
> >   */
> >  #define WR_1 0x100
> >
> > +/* 16 MiB max in 3 byte address mode */ #define MAX_3BYTES_SIZE
> > +0x1000000
> > +
> >  typedef struct FlashPartInfo {
> >      const char *part_name;
> >      /* jedec code. (jedec >> 16) & 0xff is the 1st byte, >> 8 the 2nd
> > etc */ @@ -234,6 +237,9 @@ typedef enum {
> >      ERASE_32K = 0x52,
> >      ERASE_SECTOR = 0xd8,
> >
> > +    EXTEND_ADDR_READ = 0xC8,
> > +    EXTEND_ADDR_WRITE = 0xC5,
> > +
> >      RESET_ENABLE = 0x66,
> >      RESET_MEMORY = 0x99,
> >  } FlashCMD;
> > @@ -264,6 +270,7 @@ typedef struct Flash {
> >      uint64_t cur_addr;
> >      bool write_enable;
> >      bool reset_enable;
> > +    uint8_t ear;
> >
> >      int64_t dirty_page;
> >
> > @@ -404,6 +411,7 @@ static void complete_collecting_data(Flash *s)uu
> >      s->cur_addr = s->data[0] << 16;
> >      s->cur_addr |= s->data[1] << 8;
> >      s->cur_addr |= s->data[2];
> > +        s->cur_addr += (s->ear & 0x3) * MAX_3BYTES_SIZE;
> 
> here ^
> 
> and this line does not appear in patch 5 which is curious. Is that a refresh
> issue ?
> 
s->cur_addr += (s->ear & 0x3) * MAX_3BYTES_SIZE; is at line 61.

Thanks,
Marcin

> Thanks,
> 
> C.
> 
> >
> >      s->state = STATE_IDLE;
> >
> > @@ -431,6 +439,9 @@ static void complete_collecting_data(Flash *s)
> >              s->write_enable = false;
> >          }
> >          break;
> > +    case EXTEND_ADDR_WRITE:
> > +        s->ear = s->data[0];
> > +        break;
> >      default:
> >          break;
> >      }
> > @@ -440,6 +451,7 @@ static void reset_memory(Flash *s)  {
> >      s->cmd_in_progress = NOP;
> >      s->cur_addr = 0;
> > +    s->ear = 0;
> >      s->len = 0;
> >      s->needed_bytes = 0;
> >      s->pos = 0;
> > @@ -563,6 +575,20 @@ static void decode_new_cmd(Flash *s, uint32_t
> value)
> >          break;
> >      case NOP:
> >          break;
> > +    case EXTEND_ADDR_READ:
> > +        s->data[0] = s->ear;
> > +        s->pos = 0;
> > +        s->len = 1;
> > +        s->state = STATE_READING_DATA;
> > +        break;
> > +    case EXTEND_ADDR_WRITE:
> > +        if (s->write_enable) {
> > +            s->needed_bytes = 1;
> > +            s->pos = 0;
> > +            s->len = 0;
> > +            s->state = STATE_COLLECTING_DATA;
> > +        }
> > +        break;
> >      case RESET_ENABLE:
> >          s->reset_enable = true;
> >          break;
> > @@ -699,6 +725,7 @@ static const VMStateDescription vmstate_m25p80 =
> {
> >          VMSTATE_UINT8(cmd_in_progress, Flash),
> >          VMSTATE_UINT64(cur_addr, Flash),
> >          VMSTATE_BOOL(write_enable, Flash),
> > +        VMSTATE_UINT8(ear, Flash),
> >          VMSTATE_BOOL(reset_enable, Flash),
> >          VMSTATE_END_OF_LIST()
> >      }
> >
diff mbox

Patch

diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index f9088c5..6b5f00d 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -48,6 +48,9 @@ 
  */
 #define WR_1 0x100
 
+/* 16 MiB max in 3 byte address mode */
+#define MAX_3BYTES_SIZE 0x1000000
+
 typedef struct FlashPartInfo {
     const char *part_name;
     /* jedec code. (jedec >> 16) & 0xff is the 1st byte, >> 8 the 2nd etc */
@@ -234,6 +237,9 @@  typedef enum {
     ERASE_32K = 0x52,
     ERASE_SECTOR = 0xd8,
 
+    EXTEND_ADDR_READ = 0xC8,
+    EXTEND_ADDR_WRITE = 0xC5,
+
     RESET_ENABLE = 0x66,
     RESET_MEMORY = 0x99,
 } FlashCMD;
@@ -264,6 +270,7 @@  typedef struct Flash {
     uint64_t cur_addr;
     bool write_enable;
     bool reset_enable;
+    uint8_t ear;
 
     int64_t dirty_page;
 
@@ -404,6 +411,7 @@  static void complete_collecting_data(Flash *s)
     s->cur_addr = s->data[0] << 16;
     s->cur_addr |= s->data[1] << 8;
     s->cur_addr |= s->data[2];
+        s->cur_addr += (s->ear & 0x3) * MAX_3BYTES_SIZE;
 
     s->state = STATE_IDLE;
 
@@ -431,6 +439,9 @@  static void complete_collecting_data(Flash *s)
             s->write_enable = false;
         }
         break;
+    case EXTEND_ADDR_WRITE:
+        s->ear = s->data[0];
+        break;
     default:
         break;
     }
@@ -440,6 +451,7 @@  static void reset_memory(Flash *s)
 {
     s->cmd_in_progress = NOP;
     s->cur_addr = 0;
+    s->ear = 0;
     s->len = 0;
     s->needed_bytes = 0;
     s->pos = 0;
@@ -563,6 +575,20 @@  static void decode_new_cmd(Flash *s, uint32_t value)
         break;
     case NOP:
         break;
+    case EXTEND_ADDR_READ:
+        s->data[0] = s->ear;
+        s->pos = 0;
+        s->len = 1;
+        s->state = STATE_READING_DATA;
+        break;
+    case EXTEND_ADDR_WRITE:
+        if (s->write_enable) {
+            s->needed_bytes = 1;
+            s->pos = 0;
+            s->len = 0;
+            s->state = STATE_COLLECTING_DATA;
+        }
+        break;
     case RESET_ENABLE:
         s->reset_enable = true;
         break;
@@ -699,6 +725,7 @@  static const VMStateDescription vmstate_m25p80 = {
         VMSTATE_UINT8(cmd_in_progress, Flash),
         VMSTATE_UINT64(cur_addr, Flash),
         VMSTATE_BOOL(write_enable, Flash),
+        VMSTATE_UINT8(ear, Flash),
         VMSTATE_BOOL(reset_enable, Flash),
         VMSTATE_END_OF_LIST()
     }