| Message ID | 1455217909-28317-3-git-send-email-peter.maydell@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 11.02.2016 22:11, Peter Maydell wrote: > Move get/set_r13_banked() from helper.c to op_helper.c. This will > let us add exception-raising code to them, and also puts them > in the same file as get/set_user_reg(), which makes some conceptual > sense. > > (The original reason for the helper.c/op_helper.c split was that > only op_helper.c had access to the CPU env pointer; this distinction > has not been true for a long time, though, and so the split is > now rather arbitrary.) > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> > --- > target-arm/helper.c | 33 --------------------------------- > target-arm/op_helper.c | 37 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 37 insertions(+), 33 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index bb913c6..c46e3d0 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -5365,21 +5365,6 @@ void switch_mode(CPUARMState *env, int mode) > } > } > > -void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > -{ > - ARMCPU *cpu = arm_env_get_cpu(env); > - > - cpu_abort(CPU(cpu), "banked r13 write\n"); > -} > - > -uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > -{ > - ARMCPU *cpu = arm_env_get_cpu(env); > - > - cpu_abort(CPU(cpu), "banked r13 read\n"); > - return 0; > -} > - > uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, > uint32_t cur_el, bool secure) > { > @@ -7762,24 +7747,6 @@ hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr addr, > return phys_addr; > } > > -void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > -{ > - if ((env->uncached_cpsr & CPSR_M) == mode) { > - env->regs[13] = val; > - } else { > - env->banked_r13[bank_number(mode)] = val; > - } > -} > - > -uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > -{ > - if ((env->uncached_cpsr & CPSR_M) == mode) { > - return env->regs[13]; > - } else { > - return env->banked_r13[bank_number(mode)]; > - } > -} > - > uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg) > { > ARMCPU *cpu = arm_env_get_cpu(env); > diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c > index 049b521..053e9b6 100644 > --- a/target-arm/op_helper.c > +++ b/target-arm/op_helper.c > @@ -457,6 +457,43 @@ void HELPER(set_user_reg)(CPUARMState *env, uint32_t regno, uint32_t val) > } > } > > +#if defined(CONFIG_USER_ONLY) > +void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > +{ > + ARMCPU *cpu = arm_env_get_cpu(env); > + > + cpu_abort(CPU(cpu), "banked r13 write\n"); > +} > + > +uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > +{ > + ARMCPU *cpu = arm_env_get_cpu(env); > + > + cpu_abort(CPU(cpu), "banked r13 read\n"); > + return 0; > +} > + > +#else > + > +void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > +{ > + if ((env->uncached_cpsr & CPSR_M) == mode) { > + env->regs[13] = val; > + } else { > + env->banked_r13[bank_number(mode)] = val; > + } > +} > + > +uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > +{ > + if ((env->uncached_cpsr & CPSR_M) == mode) { > + return env->regs[13]; > + } else { > + return env->banked_r13[bank_number(mode)]; > + } > +} > +#endif > + > void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome, > uint32_t isread) > {
On Thu, Feb 11, 2016 at 07:11:47PM +0000, Peter Maydell wrote: > Move get/set_r13_banked() from helper.c to op_helper.c. This will > let us add exception-raising code to them, and also puts them > in the same file as get/set_user_reg(), which makes some conceptual > sense. > > (The original reason for the helper.c/op_helper.c split was that > only op_helper.c had access to the CPU env pointer; this distinction > has not been true for a long time, though, and so the split is > now rather arbitrary.) > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > target-arm/helper.c | 33 --------------------------------- > target-arm/op_helper.c | 37 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 37 insertions(+), 33 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index bb913c6..c46e3d0 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -5365,21 +5365,6 @@ void switch_mode(CPUARMState *env, int mode) > } > } > > -void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > -{ > - ARMCPU *cpu = arm_env_get_cpu(env); > - > - cpu_abort(CPU(cpu), "banked r13 write\n"); > -} > - > -uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > -{ > - ARMCPU *cpu = arm_env_get_cpu(env); > - > - cpu_abort(CPU(cpu), "banked r13 read\n"); > - return 0; > -} > - > uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, > uint32_t cur_el, bool secure) > { > @@ -7762,24 +7747,6 @@ hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr addr, > return phys_addr; > } > > -void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > -{ > - if ((env->uncached_cpsr & CPSR_M) == mode) { > - env->regs[13] = val; > - } else { > - env->banked_r13[bank_number(mode)] = val; > - } > -} > - > -uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > -{ > - if ((env->uncached_cpsr & CPSR_M) == mode) { > - return env->regs[13]; > - } else { > - return env->banked_r13[bank_number(mode)]; > - } > -} > - > uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg) > { > ARMCPU *cpu = arm_env_get_cpu(env); > diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c > index 049b521..053e9b6 100644 > --- a/target-arm/op_helper.c > +++ b/target-arm/op_helper.c > @@ -457,6 +457,43 @@ void HELPER(set_user_reg)(CPUARMState *env, uint32_t regno, uint32_t val) > } > } > > +#if defined(CONFIG_USER_ONLY) > +void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > +{ > + ARMCPU *cpu = arm_env_get_cpu(env); > + > + cpu_abort(CPU(cpu), "banked r13 write\n"); > +} > + > +uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > +{ > + ARMCPU *cpu = arm_env_get_cpu(env); > + > + cpu_abort(CPU(cpu), "banked r13 read\n"); > + return 0; > +} > + > +#else > + > +void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > +{ > + if ((env->uncached_cpsr & CPSR_M) == mode) { > + env->regs[13] = val; > + } else { > + env->banked_r13[bank_number(mode)] = val; > + } > +} > + > +uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > +{ > + if ((env->uncached_cpsr & CPSR_M) == mode) { > + return env->regs[13]; > + } else { > + return env->banked_r13[bank_number(mode)]; > + } > +} > +#endif > + > void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome, > uint32_t isread) > { > -- > 1.9.1 >
diff --git a/target-arm/helper.c b/target-arm/helper.c index bb913c6..c46e3d0 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -5365,21 +5365,6 @@ void switch_mode(CPUARMState *env, int mode) } } -void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) -{ - ARMCPU *cpu = arm_env_get_cpu(env); - - cpu_abort(CPU(cpu), "banked r13 write\n"); -} - -uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) -{ - ARMCPU *cpu = arm_env_get_cpu(env); - - cpu_abort(CPU(cpu), "banked r13 read\n"); - return 0; -} - uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, uint32_t cur_el, bool secure) { @@ -7762,24 +7747,6 @@ hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr addr, return phys_addr; } -void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) -{ - if ((env->uncached_cpsr & CPSR_M) == mode) { - env->regs[13] = val; - } else { - env->banked_r13[bank_number(mode)] = val; - } -} - -uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) -{ - if ((env->uncached_cpsr & CPSR_M) == mode) { - return env->regs[13]; - } else { - return env->banked_r13[bank_number(mode)]; - } -} - uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg) { ARMCPU *cpu = arm_env_get_cpu(env); diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 049b521..053e9b6 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -457,6 +457,43 @@ void HELPER(set_user_reg)(CPUARMState *env, uint32_t regno, uint32_t val) } } +#if defined(CONFIG_USER_ONLY) +void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) +{ + ARMCPU *cpu = arm_env_get_cpu(env); + + cpu_abort(CPU(cpu), "banked r13 write\n"); +} + +uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) +{ + ARMCPU *cpu = arm_env_get_cpu(env); + + cpu_abort(CPU(cpu), "banked r13 read\n"); + return 0; +} + +#else + +void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) +{ + if ((env->uncached_cpsr & CPSR_M) == mode) { + env->regs[13] = val; + } else { + env->banked_r13[bank_number(mode)] = val; + } +} + +uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) +{ + if ((env->uncached_cpsr & CPSR_M) == mode) { + return env->regs[13]; + } else { + return env->banked_r13[bank_number(mode)]; + } +} +#endif + void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome, uint32_t isread) {
Move get/set_r13_banked() from helper.c to op_helper.c. This will let us add exception-raising code to them, and also puts them in the same file as get/set_user_reg(), which makes some conceptual sense. (The original reason for the helper.c/op_helper.c split was that only op_helper.c had access to the CPU env pointer; this distinction has not been true for a long time, though, and so the split is now rather arbitrary.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target-arm/helper.c | 33 --------------------------------- target-arm/op_helper.c | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 33 deletions(-)