From patchwork Fri Feb 19 03:30:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Xu X-Patchwork-Id: 8356011 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D798E9F314 for ; Fri, 19 Feb 2016 03:38:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 715BF203F3 for ; Fri, 19 Feb 2016 03:38:10 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BD25E203F1 for ; Fri, 19 Feb 2016 03:38:09 +0000 (UTC) Received: from localhost ([::1]:48015 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aWbtR-0005Wh-7P for patchwork-qemu-devel@patchwork.kernel.org; Thu, 18 Feb 2016 22:38:09 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51918) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aWbnT-000434-CR for qemu-devel@nongnu.org; Thu, 18 Feb 2016 22:32:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aWbnS-0000dI-Fa for qemu-devel@nongnu.org; Thu, 18 Feb 2016 22:31:59 -0500 Received: from mx1.redhat.com ([209.132.183.28]:48437) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aWbnS-0000dE-AY for qemu-devel@nongnu.org; Thu, 18 Feb 2016 22:31:58 -0500 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (Postfix) with ESMTPS id 04795C0006EC; Fri, 19 Feb 2016 03:31:58 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-7-234.pek2.redhat.com [10.72.7.234]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u1J3UOjl028429; Thu, 18 Feb 2016 22:31:50 -0500 From: Peter Xu To: qemu-devel@nongnu.org Date: Fri, 19 Feb 2016 11:30:15 +0800 Message-Id: <1455852618-5224-11-git-send-email-peterx@redhat.com> In-Reply-To: <1455852618-5224-1-git-send-email-peterx@redhat.com> References: <1455852618-5224-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: ehabkost@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, pbonzini@redhat.com, imammedo@redhat.com, rth@twiddle.net Subject: [Qemu-devel] [PATCH 10/13] ioapic-common: add iommu for IOAPICCommonState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When IR is enabled for IOMMU, each IOAPIC will belong to a specific intel IOMMU. This pointer will store the owner of current IOAPIC, which is always the default IOMMU device. Signed-off-by: Peter Xu --- hw/intc/ioapic_common.c | 2 ++ include/hw/i386/ioapic_internal.h | 3 +++ 2 files changed, 5 insertions(+) diff --git a/hw/intc/ioapic_common.c b/hw/intc/ioapic_common.c index 0a48de2..2c25aaa 100644 --- a/hw/intc/ioapic_common.c +++ b/hw/intc/ioapic_common.c @@ -136,6 +136,8 @@ static void ioapic_common_realize(DeviceState *dev, Error **errp) sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->io_memory); ioapic_no++; + + s->iommu = vtd_iommu_get(); } static const VMStateDescription vmstate_ioapic_common = { diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h index 797ed47..41fc282 100644 --- a/include/hw/i386/ioapic_internal.h +++ b/include/hw/i386/ioapic_internal.h @@ -25,6 +25,7 @@ #include "hw/hw.h" #include "exec/memory.h" #include "hw/sysbus.h" +#include "hw/i386/intel_iommu.h" #define MAX_IOAPICS 1 @@ -101,6 +102,8 @@ struct IOAPICCommonState { uint8_t ioregsel; uint32_t irr; uint64_t ioredtbl[IOAPIC_NUM_PINS]; + /* IOMMU pointer that this IOAPIC belongs. */ + IntelIOMMUState *iommu; }; void ioapic_reset_common(DeviceState *dev);