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Thu, 25 Feb 2016 18:31:51 +0800 (CST) From: xiaoqiang zhao To: qemu-devel@nongnu.org Date: Thu, 25 Feb 2016 18:30:31 +0800 Message-Id: <1456396236-2759-4-git-send-email-zxq_yx_007@163.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1456396236-2759-1-git-send-email-zxq_yx_007@163.com> References: <1456396236-2759-1-git-send-email-zxq_yx_007@163.com> X-CM-TRANSID: DsCowAB3JtoL2M5WrXOWCA--.37006S5 X-Coremail-Antispam: 1Uf129KBjvJXoWxZw1DtF1xCF4kGr45AFyUtrb_yoW5Xw4rpF Z7AF95WrW8GF47JrWfKrWkGas5Jwn3Gw48t3WxGwsakw1xGr95JF1kA3ya9rWDGrZ7ZF4r tay8tF13W3W7Gw7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jxJ5rUUUUU= X-Originating-IP: [101.254.142.162] X-CM-SenderInfo: 520ts5t0bqili6rwjhhfrp/1tbiTBgaxlSINjh3xwAAsq X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 220.181.12.14 Cc: peter.maydell@linaro.org, i.mitsyanko@gmail.com, mark.cave-ayland@ilande.co.uk, michael@walle.cc, qemu-arm@nongnu.org, edgar.iglesias@gmail.com, gxt@mprc.pku.edu.cn, afaerber@suse.de Subject: [Qemu-devel] [PATCH v5 3/8] hw/timer: QOM'ify m48txx_sysbus (pass 1) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, FREEMAIL_FROM,UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP * split the old SysBus init function into an instance_init and a Device realize function * use DeviceClass::realize instead of SysBusDeviceClass::init Signed-off-by: xiaoqiang zhao --- hw/timer/m48t59.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c index bbcfeb2..3c683aa 100644 --- a/hw/timer/m48t59.c +++ b/hw/timer/m48t59.c @@ -763,30 +763,31 @@ static void m48t59_isa_realize(DeviceState *dev, Error **errp) } } -static int m48t59_init1(SysBusDevice *dev) +static void m48t59_init1(Object *obj) { - M48txxSysBusDeviceClass *u = M48TXX_SYS_BUS_GET_CLASS(dev); - M48txxSysBusState *d = M48TXX_SYS_BUS(dev); - Object *o = OBJECT(dev); + M48txxSysBusDeviceClass *u = M48TXX_SYS_BUS_GET_CLASS(obj); + M48txxSysBusState *d = M48TXX_SYS_BUS(obj); + SysBusDevice *dev = SYS_BUS_DEVICE(obj); M48t59State *s = &d->state; - Error *err = NULL; s->model = u->info.model; s->size = u->info.size; sysbus_init_irq(dev, &s->IRQ); - memory_region_init_io(&s->iomem, o, &nvram_ops, s, "m48t59.nvram", + memory_region_init_io(&s->iomem, obj, &nvram_ops, s, "m48t59.nvram", s->size); - memory_region_init_io(&d->io, o, &m48t59_io_ops, s, "m48t59", 4); - sysbus_init_mmio(dev, &s->iomem); - sysbus_init_mmio(dev, &d->io); - m48t59_realize_common(s, &err); - if (err != NULL) { - error_free(err); - return -1; - } + memory_region_init_io(&d->io, obj, &m48t59_io_ops, s, "m48t59", 4); +} - return 0; +static void m48t59_realize(DeviceState *dev, Error **errp) +{ + M48txxSysBusState *d = M48TXX_SYS_BUS(dev); + M48t59State *s = &d->state; + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + + sysbus_init_mmio(sbd, &s->iomem); + sysbus_init_mmio(sbd, &d->io); + m48t59_realize_common(s, errp); } static uint32_t m48txx_isa_read(Nvram *obj, uint32_t addr) @@ -860,10 +861,9 @@ static Property m48t59_sysbus_properties[] = { static void m48txx_sysbus_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); NvramClass *nc = NVRAM_CLASS(klass); - k->init = m48t59_init1; + dc->realize = m48t59_realize; dc->reset = m48t59_reset_sysbus; dc->props = m48t59_sysbus_properties; nc->read = m48txx_sysbus_read; @@ -889,6 +889,7 @@ static const TypeInfo m48txx_sysbus_type_info = { .name = TYPE_M48TXX_SYS_BUS, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(M48txxSysBusState), + .instance_init = m48t59_init1, .abstract = true, .class_init = m48txx_sysbus_class_init, .interfaces = (InterfaceInfo[]) {