Message ID | 1456486323-8047-8-git-send-email-david@gibson.dropbear.id.au (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 02/26/2016 10:31 PM, David Gibson wrote: > Simplify the sPAPR PCI code by folding spapr_phb_eeh_set_option() into > rtas_ibm_set_eeh_option(). > > Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> > --- > hw/ppc/spapr_pci.c | 43 +++++++++++++++++++++++++++++++++++++++-- > hw/ppc/spapr_pci_vfio.c | 47 --------------------------------------------- > include/hw/pci-host/spapr.h | 4 ---- > 3 files changed, 41 insertions(+), 53 deletions(-) > > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > index eaae7e2..26d08ad 100644 > --- a/hw/ppc/spapr_pci.c > +++ b/hw/ppc/spapr_pci.c > @@ -450,6 +450,7 @@ static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu, > sPAPRPHBState *sphb; > uint32_t addr, option; > uint64_t buid; > + uint32_t op; > int ret; > > if ((nargs != 4) || (nret != 1)) { > @@ -469,8 +470,46 @@ static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu, > goto param_error_exit; > } > > - ret = spapr_phb_vfio_eeh_set_option(sphb, addr, option); > - rtas_st(rets, 0, ret); > + switch (option) { > + case RTAS_EEH_DISABLE: > + op = VFIO_EEH_PE_DISABLE; > + break; > + case RTAS_EEH_ENABLE: { > + PCIHostState *phb; > + PCIDevice *pdev; > + > + /* > + * The EEH functionality is enabled on basis of PCI device, > + * instead of PE. We need check the validity of the PCI > + * device address. > + */ > + phb = PCI_HOST_BRIDGE(sphb); > + pdev = pci_find_device(phb->bus, > + (addr >> 16) & 0xFF, (addr >> 8) & 0xFF); > + if (!pdev || !object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { > + goto param_error_exit; > + } > + > + op = VFIO_EEH_PE_ENABLE; > + break; > + } > + case RTAS_EEH_THAW_IO: > + op = VFIO_EEH_PE_UNFREEZE_IO; > + break; > + case RTAS_EEH_THAW_DMA: > + op = VFIO_EEH_PE_UNFREEZE_DMA; > + break; > + default: > + goto param_error_exit; > + } > + > + ret = vfio_eeh_as_op(&sphb->iommu_as, op); > + if (ret < 0) { > + rtas_st(rets, 0, RTAS_OUT_HW_ERROR); > + return; > + } > + > + rtas_st(rets, 0, RTAS_OUT_SUCCESS); > return; > > param_error_exit: > diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c > index c87f2e4..cccd444 100644 > --- a/hw/ppc/spapr_pci_vfio.c > +++ b/hw/ppc/spapr_pci_vfio.c > @@ -89,53 +89,6 @@ void spapr_phb_vfio_reset(DeviceState *qdev) > spapr_phb_vfio_eeh_reenable(SPAPR_PCI_HOST_BRIDGE(qdev)); > } > > -int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, > - unsigned int addr, int option) > -{ > - uint32_t op; > - int ret; > - > - switch (option) { > - case RTAS_EEH_DISABLE: > - op = VFIO_EEH_PE_DISABLE; > - break; > - case RTAS_EEH_ENABLE: { > - PCIHostState *phb; > - PCIDevice *pdev; > - > - /* > - * The EEH functionality is enabled on basis of PCI device, > - * instead of PE. We need check the validity of the PCI > - * device address. > - */ > - phb = PCI_HOST_BRIDGE(sphb); > - pdev = pci_find_device(phb->bus, > - (addr >> 16) & 0xFF, (addr >> 8) & 0xFF); > - if (!pdev || !object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { > - return RTAS_OUT_PARAM_ERROR; > - } > - > - op = VFIO_EEH_PE_ENABLE; > - break; > - } > - case RTAS_EEH_THAW_IO: > - op = VFIO_EEH_PE_UNFREEZE_IO; > - break; > - case RTAS_EEH_THAW_DMA: > - op = VFIO_EEH_PE_UNFREEZE_DMA; > - break; > - default: > - return RTAS_OUT_PARAM_ERROR; > - } > - > - ret = vfio_eeh_as_op(&sphb->iommu_as, op); > - if (ret < 0) { > - return RTAS_OUT_HW_ERROR; > - } > - > - return RTAS_OUT_SUCCESS; > -} > - > static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h > index 55237fc..d32750e 100644 > --- a/include/hw/pci-host/spapr.h > +++ b/include/hw/pci-host/spapr.h > @@ -135,8 +135,4 @@ PCIDevice *spapr_pci_find_dev(sPAPRMachineState *spapr, uint64_t buid, > uint32_t config_addr); > void spapr_phb_vfio_reset(DeviceState *qdev); > > -/* VFIO EEH hooks */ > -int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, > - unsigned int addr, int option); > - > #endif /* __HW_SPAPR_PCI_H__ */ >
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index eaae7e2..26d08ad 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -450,6 +450,7 @@ static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu, sPAPRPHBState *sphb; uint32_t addr, option; uint64_t buid; + uint32_t op; int ret; if ((nargs != 4) || (nret != 1)) { @@ -469,8 +470,46 @@ static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu, goto param_error_exit; } - ret = spapr_phb_vfio_eeh_set_option(sphb, addr, option); - rtas_st(rets, 0, ret); + switch (option) { + case RTAS_EEH_DISABLE: + op = VFIO_EEH_PE_DISABLE; + break; + case RTAS_EEH_ENABLE: { + PCIHostState *phb; + PCIDevice *pdev; + + /* + * The EEH functionality is enabled on basis of PCI device, + * instead of PE. We need check the validity of the PCI + * device address. + */ + phb = PCI_HOST_BRIDGE(sphb); + pdev = pci_find_device(phb->bus, + (addr >> 16) & 0xFF, (addr >> 8) & 0xFF); + if (!pdev || !object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { + goto param_error_exit; + } + + op = VFIO_EEH_PE_ENABLE; + break; + } + case RTAS_EEH_THAW_IO: + op = VFIO_EEH_PE_UNFREEZE_IO; + break; + case RTAS_EEH_THAW_DMA: + op = VFIO_EEH_PE_UNFREEZE_DMA; + break; + default: + goto param_error_exit; + } + + ret = vfio_eeh_as_op(&sphb->iommu_as, op); + if (ret < 0) { + rtas_st(rets, 0, RTAS_OUT_HW_ERROR); + return; + } + + rtas_st(rets, 0, RTAS_OUT_SUCCESS); return; param_error_exit: diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c index c87f2e4..cccd444 100644 --- a/hw/ppc/spapr_pci_vfio.c +++ b/hw/ppc/spapr_pci_vfio.c @@ -89,53 +89,6 @@ void spapr_phb_vfio_reset(DeviceState *qdev) spapr_phb_vfio_eeh_reenable(SPAPR_PCI_HOST_BRIDGE(qdev)); } -int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, - unsigned int addr, int option) -{ - uint32_t op; - int ret; - - switch (option) { - case RTAS_EEH_DISABLE: - op = VFIO_EEH_PE_DISABLE; - break; - case RTAS_EEH_ENABLE: { - PCIHostState *phb; - PCIDevice *pdev; - - /* - * The EEH functionality is enabled on basis of PCI device, - * instead of PE. We need check the validity of the PCI - * device address. - */ - phb = PCI_HOST_BRIDGE(sphb); - pdev = pci_find_device(phb->bus, - (addr >> 16) & 0xFF, (addr >> 8) & 0xFF); - if (!pdev || !object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { - return RTAS_OUT_PARAM_ERROR; - } - - op = VFIO_EEH_PE_ENABLE; - break; - } - case RTAS_EEH_THAW_IO: - op = VFIO_EEH_PE_UNFREEZE_IO; - break; - case RTAS_EEH_THAW_DMA: - op = VFIO_EEH_PE_UNFREEZE_DMA; - break; - default: - return RTAS_OUT_PARAM_ERROR; - } - - ret = vfio_eeh_as_op(&sphb->iommu_as, op); - if (ret < 0) { - return RTAS_OUT_HW_ERROR; - } - - return RTAS_OUT_SUCCESS; -} - static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 55237fc..d32750e 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -135,8 +135,4 @@ PCIDevice *spapr_pci_find_dev(sPAPRMachineState *spapr, uint64_t buid, uint32_t config_addr); void spapr_phb_vfio_reset(DeviceState *qdev); -/* VFIO EEH hooks */ -int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, - unsigned int addr, int option); - #endif /* __HW_SPAPR_PCI_H__ */
Simplify the sPAPR PCI code by folding spapr_phb_eeh_set_option() into rtas_ibm_set_eeh_option(). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> --- hw/ppc/spapr_pci.c | 43 +++++++++++++++++++++++++++++++++++++++-- hw/ppc/spapr_pci_vfio.c | 47 --------------------------------------------- include/hw/pci-host/spapr.h | 4 ---- 3 files changed, 41 insertions(+), 53 deletions(-)