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[94.39.161.17]) by smtp.gmail.com with ESMTPSA id wr2sm2418094wjc.49.2016.03.16.03.47.22 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Mar 2016 03:47:23 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Wed, 16 Mar 2016 11:46:28 +0100 Message-Id: <1458125219-131698-19-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1458125219-131698-1-git-send-email-pbonzini@redhat.com> References: <1458125219-131698-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::230 Subject: [Qemu-devel] [PATCH 18/49] target-tricore: make cpu-qom.h not target specific X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Make TriCoreCPU an opaque type within cpu-qom.h, and move all definitions of private methods, as well as all type definitions that require knowledge of the layout to cpu.h. This helps making files independent of NEED_CPU_H if they only need to pass around CPU pointers. Signed-off-by: Paolo Bonzini --- target-tricore/cpu-qom.h | 28 +--------------------------- target-tricore/cpu.h | 30 +++++++++++++++++++++++++++++- 2 files changed, 30 insertions(+), 28 deletions(-) diff --git a/target-tricore/cpu-qom.h b/target-tricore/cpu-qom.h index 66c9664..399c98f 100644 --- a/target-tricore/cpu-qom.h +++ b/target-tricore/cpu-qom.h @@ -39,32 +39,6 @@ typedef struct TriCoreCPUClass { void (*parent_reset)(CPUState *cpu); } TriCoreCPUClass; -/** - * TriCoreCPU: - * @env: #CPUTriCoreState - * - * A TriCore CPU. - */ -typedef struct TriCoreCPU { - /*< private >*/ - CPUState parent_obj; - /*< public >*/ - - CPUTriCoreState env; -} TriCoreCPU; - -static inline TriCoreCPU *tricore_env_get_cpu(CPUTriCoreState *env) -{ - return TRICORE_CPU(container_of(env, TriCoreCPU, env)); -} - -#define ENV_GET_CPU(e) CPU(tricore_env_get_cpu(e)) - -#define ENV_OFFSET offsetof(TriCoreCPU, env) - -hwaddr tricore_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -void tricore_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); - +typedef struct TriCoreCPU TriCoreCPU; #endif /*QEMU_TRICORE_CPU_QOM_H */ diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h index 5fee376..f0da68c 100644 --- a/target-tricore/cpu.h +++ b/target-tricore/cpu.h @@ -21,6 +21,7 @@ #include "tricore-defs.h" #include "qemu-common.h" +#include "cpu-qom.h" #include "exec/cpu-defs.h" #include "fpu/softfloat.h" @@ -199,6 +200,34 @@ struct CPUTriCoreState { struct QEMUTimer *timer; /* Internal timer */ }; +/** + * TriCoreCPU: + * @env: #CPUTriCoreState + * + * A TriCore CPU. + */ +struct TriCoreCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUTriCoreState env; +}; + +static inline TriCoreCPU *tricore_env_get_cpu(CPUTriCoreState *env) +{ + return TRICORE_CPU(container_of(env, TriCoreCPU, env)); +} + +#define ENV_GET_CPU(e) CPU(tricore_env_get_cpu(e)) + +#define ENV_OFFSET offsetof(TriCoreCPU, env) + +hwaddr tricore_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +void tricore_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); + + #define MASK_PCXI_PCPN 0xff000000 #define MASK_PCXI_PIE 0x00800000 #define MASK_PCXI_UL 0x00400000 @@ -339,7 +368,6 @@ enum { uint32_t psw_read(CPUTriCoreState *env); void psw_write(CPUTriCoreState *env, uint32_t val); -#include "cpu-qom.h" #define MMU_USER_IDX 2 void tricore_cpu_list(FILE *f, fprintf_function cpu_fprintf);