From patchwork Wed Mar 16 17:18:23 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 8602911 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 80134C0553 for ; Wed, 16 Mar 2016 17:21:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C6FF32026C for ; Wed, 16 Mar 2016 17:21:19 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E5DAC202FE for ; Wed, 16 Mar 2016 17:21:18 +0000 (UTC) Received: from localhost ([::1]:57666 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agF8I-0007vj-6Q for patchwork-qemu-devel@patchwork.kernel.org; Wed, 16 Mar 2016 13:21:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35440) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agF5s-0002Ce-0p for qemu-devel@nongnu.org; Wed, 16 Mar 2016 13:18:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1agF5q-0001Ho-7k for qemu-devel@nongnu.org; Wed, 16 Mar 2016 13:18:47 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:56204) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agF5p-0001Ef-OX for qemu-devel@nongnu.org; Wed, 16 Mar 2016 13:18:46 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1agF5l-0000wn-83 for qemu-devel@nongnu.org; Wed, 16 Mar 2016 17:18:41 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Wed, 16 Mar 2016 17:18:23 +0000 Message-Id: <1458148715-16864-10-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1458148715-16864-1-git-send-email-peter.maydell@linaro.org> References: <1458148715-16864-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 09/21] i.MX: Add the CLK_IPG_HIGH clock X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jean-Christophe Dubois EPIT, GPT and other i.MX timers are using "abstract" clocks among which a CLK_IPG_HIGH clock. On i.MX25 and i.MX31 CLK_IPG and CLK_IPG_HIGH are mapped to the same clock but on other SOC like i.MX6 they are mapped to distinct clocks. This patch add the CLK_IPG_HIGH to prepare for SOC where these 2 clocks are different. Reviewed-by: Peter Maydell Signed-off-by: Jean-Christophe Dubois Message-id: 224bf650194760284cb40630e985867e1373276a.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell --- hw/misc/imx25_ccm.c | 1 + hw/misc/imx31_ccm.c | 1 + hw/timer/imx_epit.c | 8 ++++---- hw/timer/imx_gpt.c | 16 ++++++++-------- include/hw/misc/imx_ccm.h | 1 + 5 files changed, 15 insertions(+), 12 deletions(-) diff --git a/hw/misc/imx25_ccm.c b/hw/misc/imx25_ccm.c index e138fc6..225604d 100644 --- a/hw/misc/imx25_ccm.c +++ b/hw/misc/imx25_ccm.c @@ -171,6 +171,7 @@ static uint32_t imx25_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock) case CLK_NONE: break; case CLK_IPG: + case CLK_IPG_HIGH: freq = imx25_ccm_get_ipg_clk(dev); break; case CLK_32k: diff --git a/hw/misc/imx31_ccm.c b/hw/misc/imx31_ccm.c index a5caabb..80c1647 100644 --- a/hw/misc/imx31_ccm.c +++ b/hw/misc/imx31_ccm.c @@ -186,6 +186,7 @@ static uint32_t imx31_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock) case CLK_NONE: break; case CLK_IPG: + case CLK_IPG_HIGH: freq = imx31_ccm_get_ipg_clk(dev); break; case CLK_32k: diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 9f26ba8..f5836e2 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit.c @@ -52,10 +52,10 @@ static char const *imx_epit_reg_name(uint32_t reg) * These are typical. */ static const IMXClk imx_epit_clocks[] = { - CLK_NONE, /* 00 disabled */ - CLK_IPG, /* 01 ipg_clk, ~532MHz */ - CLK_IPG, /* 10 ipg_clk_highfreq */ - CLK_32k, /* 11 ipg_clk_32k -- ~32kHz */ + CLK_NONE, /* 00 disabled */ + CLK_IPG, /* 01 ipg_clk, ~532MHz */ + CLK_IPG_HIGH, /* 10 ipg_clk_highfreq */ + CLK_32k, /* 11 ipg_clk_32k -- ~32kHz */ }; /* diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c index 40db63c..ab2e213 100644 --- a/hw/timer/imx_gpt.c +++ b/hw/timer/imx_gpt.c @@ -81,14 +81,14 @@ static const VMStateDescription vmstate_imx_timer_gpt = { }; static const IMXClk imx_gpt_clocks[] = { - CLK_NONE, /* 000 No clock source */ - CLK_IPG, /* 001 ipg_clk, 532MHz*/ - CLK_IPG, /* 010 ipg_clk_highfreq */ - CLK_NONE, /* 011 not defined */ - CLK_32k, /* 100 ipg_clk_32k */ - CLK_NONE, /* 101 not defined */ - CLK_NONE, /* 110 not defined */ - CLK_NONE, /* 111 not defined */ + CLK_NONE, /* 000 No clock source */ + CLK_IPG, /* 001 ipg_clk, 532MHz*/ + CLK_IPG_HIGH, /* 010 ipg_clk_highfreq */ + CLK_NONE, /* 011 not defined */ + CLK_32k, /* 100 ipg_clk_32k */ + CLK_NONE, /* 101 not defined */ + CLK_NONE, /* 110 not defined */ + CLK_NONE, /* 111 not defined */ }; static void imx_gpt_set_freq(IMXGPTState *s) diff --git a/include/hw/misc/imx_ccm.h b/include/hw/misc/imx_ccm.h index 378b78d..48a7afa 100644 --- a/include/hw/misc/imx_ccm.h +++ b/include/hw/misc/imx_ccm.h @@ -45,6 +45,7 @@ typedef struct IMXCCMState { typedef enum { CLK_NONE, CLK_IPG, + CLK_IPG_HIGH, CLK_32k } IMXClk;