From patchwork Fri Mar 25 13:49:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Alrae X-Patchwork-Id: 8671821 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B5FD8C0553 for ; Fri, 25 Mar 2016 13:53:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 211F4201ED for ; Fri, 25 Mar 2016 13:53:02 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6949B200E7 for ; Fri, 25 Mar 2016 13:53:01 +0000 (UTC) Received: from localhost ([::1]:56287 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ajSAe-00079C-Jn for patchwork-qemu-devel@patchwork.kernel.org; Fri, 25 Mar 2016 09:53:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38475) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ajS7y-0002XD-El for qemu-devel@nongnu.org; Fri, 25 Mar 2016 09:50:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ajS7u-0002H9-MM for qemu-devel@nongnu.org; Fri, 25 Mar 2016 09:50:14 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:15581) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ajS7u-0002H2-Ge for qemu-devel@nongnu.org; Fri, 25 Mar 2016 09:50:10 -0400 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Websense Email Security Gateway with ESMTPS id D5C43A39B9EDA; Fri, 25 Mar 2016 13:50:06 +0000 (GMT) Received: from lalrae-linux.kl.imgtec.org (192.168.169.37) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.266.1; Fri, 25 Mar 2016 13:50:09 +0000 From: Leon Alrae To: Date: Fri, 25 Mar 2016 13:49:34 +0000 Message-ID: <1458913777-28034-6-git-send-email-leon.alrae@imgtec.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1458913777-28034-1-git-send-email-leon.alrae@imgtec.com> References: <1458913777-28034-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.169.37] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.59.15.196 Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH v2 5/8] hw/mips: implement ITC Storage - Bypass View X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Bypass View does not cause issuing thread to block and does not affect any of the cells state bit. Read from a FIFO cell returns the value of the oldest entry. Store to a FIFO cell changes the value of the newest entry. Signed-off-by: Leon Alrae --- hw/misc/mips_itu.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index 45083b3..e628bbe 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -181,6 +181,27 @@ static void QEMU_NORETURN block_thread_and_exit(ITCStorageCell *c) cpu_loop_exit(current_cpu); } +/* ITC Bypass View */ + +static inline uint64_t view_bypass_read(ITCStorageCell *c) +{ + if (c->tag.FIFO) { + return c->data[c->fifo_out]; + } else { + return c->data[0]; + } +} + +static inline void view_bypass_write(ITCStorageCell *c, uint64_t val) +{ + if (c->tag.FIFO && (c->tag.FIFOPtr > 0)) { + int idx = (c->fifo_out + c->tag.FIFOPtr - 1) % ITC_CELL_DEPTH; + c->data[idx] = val; + } + + /* ignore a write to the semaphore cell */ +} + /* ITC Control View */ static inline uint64_t view_control_read(ITCStorageCell *c) @@ -347,6 +368,9 @@ static uint64_t itc_storage_read(void *opaque, hwaddr addr, unsigned size) uint64_t ret = -1; switch (view) { + case ITCVIEW_BYPASS: + ret = view_bypass_read(cell); + break; case ITCVIEW_CONTROL: ret = view_control_read(cell); break; @@ -379,6 +403,9 @@ static void itc_storage_write(void *opaque, hwaddr addr, uint64_t data, ITCView view = get_itc_view(addr); switch (view) { + case ITCVIEW_BYPASS: + view_bypass_write(cell, data); + break; case ITCVIEW_CONTROL: view_control_write(cell, data); break;