From patchwork Wed Mar 30 17:13:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 8701551 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 809F5C0553 for ; Wed, 30 Mar 2016 17:13:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C641720376 for ; Wed, 30 Mar 2016 17:13:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F29C820382 for ; Wed, 30 Mar 2016 17:13:31 +0000 (UTC) Received: from localhost ([::1]:55930 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1alJgR-0000tg-9Z for patchwork-qemu-devel@patchwork.kernel.org; Wed, 30 Mar 2016 13:13:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50302) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1alJgC-0000nt-5l for qemu-devel@nongnu.org; Wed, 30 Mar 2016 13:13:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1alJg8-0006CV-SB for qemu-devel@nongnu.org; Wed, 30 Mar 2016 13:13:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:60523) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1alJg8-0006CA-LI; Wed, 30 Mar 2016 13:13:12 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (Postfix) with ESMTPS id 6989D711CD; Wed, 30 Mar 2016 17:13:11 +0000 (UTC) Received: from thinkpad.redhat.com (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u2UHD7D5024072; Wed, 30 Mar 2016 13:13:08 -0400 From: Laurent Vivier To: Alexander Graf Date: Wed, 30 Mar 2016 19:13:00 +0200 Message-Id: <1459357980-29330-1-git-send-email-lvivier@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 30 Mar 2016 17:13:11 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Cc: Laurent Vivier , dgibson@redhat.com, thuth@redhat.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP If the processor is in little-endian mode, an alignment interrupt must occur for the following instructions: lmw, stmw, lswi, lswx, stswi or stswx. This is what happens with KVM, so change TCG to do the same. As the instruction can be emulated by the kernel, enable the change only in softmmu mode. Signed-off-by: Laurent Vivier --- target-ppc/translate.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 6f0e7b4..e33dcf7 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3181,6 +3181,13 @@ static void gen_lmw(DisasContext *ctx) { TCGv t0; TCGv_i32 t1; +#if !defined(CONFIG_USER_ONLY) + if (ctx->le_mode) { + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE); + return; + } +#endif + gen_set_access_type(ctx, ACCESS_INT); /* NIP cannot be restored if the memory exception comes from an helper */ gen_update_nip(ctx, ctx->nip - 4); @@ -3197,6 +3204,13 @@ static void gen_stmw(DisasContext *ctx) { TCGv t0; TCGv_i32 t1; +#if !defined(CONFIG_USER_ONLY) + if (ctx->le_mode) { + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE); + return; + } +#endif + gen_set_access_type(ctx, ACCESS_INT); /* NIP cannot be restored if the memory exception comes from an helper */ gen_update_nip(ctx, ctx->nip - 4); @@ -3224,6 +3238,13 @@ static void gen_lswi(DisasContext *ctx) int start = rD(ctx->opcode); int ra = rA(ctx->opcode); int nr; +#if !defined(CONFIG_USER_ONLY) + if (ctx->le_mode) { + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE); + return; + } +#endif + if (nb == 0) nb = 32; @@ -3252,6 +3273,13 @@ static void gen_lswx(DisasContext *ctx) { TCGv t0; TCGv_i32 t1, t2, t3; +#if !defined(CONFIG_USER_ONLY) + if (ctx->le_mode) { + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE); + return; + } +#endif + gen_set_access_type(ctx, ACCESS_INT); /* NIP cannot be restored if the memory exception comes from an helper */ gen_update_nip(ctx, ctx->nip - 4); @@ -3273,6 +3301,13 @@ static void gen_stswi(DisasContext *ctx) TCGv t0; TCGv_i32 t1, t2; int nb = NB(ctx->opcode); +#if !defined(CONFIG_USER_ONLY) + if (ctx->le_mode) { + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE); + return; + } +#endif + gen_set_access_type(ctx, ACCESS_INT); /* NIP cannot be restored if the memory exception comes from an helper */ gen_update_nip(ctx, ctx->nip - 4); @@ -3293,6 +3328,13 @@ static void gen_stswx(DisasContext *ctx) { TCGv t0; TCGv_i32 t1, t2; +#if !defined(CONFIG_USER_ONLY) + if (ctx->le_mode) { + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE); + return; + } +#endif + gen_set_access_type(ctx, ACCESS_INT); /* NIP cannot be restored if the memory exception comes from an helper */ gen_update_nip(ctx, ctx->nip - 4);