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[94.39.141.76]) by smtp.gmail.com with ESMTPSA id w10sm3849168wjz.9.2016.04.08.13.29.29 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Apr 2016 13:29:29 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Fri, 8 Apr 2016 22:28:36 +0200 Message-Id: <1460147350-7601-17-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1460147350-7601-1-git-send-email-pbonzini@redhat.com> References: <1460147350-7601-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::244 Subject: [Qemu-devel] [PATCH 16/50] target-sh4: make cpu-qom.h not target specific X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Make SuperHCPU an opaque type within cpu-qom.h, and move all definitions of private methods, as well as all type definitions that require knowledge of the layout to cpu.h. This helps making files independent of NEED_CPU_H if they only need to pass around CPU pointers. Signed-off-by: Paolo Bonzini --- target-sh4/cpu-qom.h | 31 +------------------------------ target-sh4/cpu.h | 32 +++++++++++++++++++++++++++++++- 2 files changed, 32 insertions(+), 31 deletions(-) diff --git a/target-sh4/cpu-qom.h b/target-sh4/cpu-qom.h index 6341238..01abb20 100644 --- a/target-sh4/cpu-qom.h +++ b/target-sh4/cpu-qom.h @@ -60,35 +60,6 @@ typedef struct SuperHCPUClass { uint32_t cvr; } SuperHCPUClass; -/** - * SuperHCPU: - * @env: #CPUSH4State - * - * A SuperH CPU. - */ -typedef struct SuperHCPU { - /*< private >*/ - CPUState parent_obj; - /*< public >*/ - - CPUSH4State env; -} SuperHCPU; - -static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env) -{ - return container_of(env, SuperHCPU, env); -} - -#define ENV_GET_CPU(e) CPU(sh_env_get_cpu(e)) - -#define ENV_OFFSET offsetof(SuperHCPU, env) - -void superh_cpu_do_interrupt(CPUState *cpu); -bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req); -void superh_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); -hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -int superh_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); -int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +typedef struct SuperHCPU SuperHCPU; #endif diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 3b23e96..0acb60c 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -20,6 +20,7 @@ #define _CPU_SH4_H #include "qemu-common.h" +#include "cpu-qom.h" #define TARGET_LONG_BITS 32 @@ -187,7 +188,36 @@ typedef struct CPUSH4State { memory_content **movcal_backup_tail; } CPUSH4State; -#include "cpu-qom.h" +/** + * SuperHCPU: + * @env: #CPUSH4State + * + * A SuperH CPU. + */ +struct SuperHCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUSH4State env; +}; + +static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env) +{ + return container_of(env, SuperHCPU, env); +} + +#define ENV_GET_CPU(e) CPU(sh_env_get_cpu(e)) + +#define ENV_OFFSET offsetof(SuperHCPU, env) + +void superh_cpu_do_interrupt(CPUState *cpu); +bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req); +void superh_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); +hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int superh_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void sh4_translate_init(void); SuperHCPU *cpu_sh4_init(const char *cpu_model);