From patchwork Thu Apr 21 08:48:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 8897411 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 570E89F39A for ; Thu, 21 Apr 2016 08:49:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5F1CE20260 for ; Thu, 21 Apr 2016 08:49:30 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AD87E20121 for ; Thu, 21 Apr 2016 08:49:27 +0000 (UTC) Received: from localhost ([::1]:37196 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atAIh-00006J-64 for patchwork-qemu-devel@patchwork.kernel.org; Thu, 21 Apr 2016 04:49:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atAIS-0008O6-8A for qemu-devel@nongnu.org; Thu, 21 Apr 2016 04:49:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1atAIL-0002DJ-50 for qemu-devel@nongnu.org; Thu, 21 Apr 2016 04:49:12 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:49333) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atAIK-0002CX-ON for qemu-devel@nongnu.org; Thu, 21 Apr 2016 04:49:05 -0400 Received: from ohm.aurel32.net ([2001:bc8:30d7:111::1000]) by hall.aurel32.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84_2) (envelope-from ) id 1atAIA-00041h-JM; Thu, 21 Apr 2016 10:48:54 +0200 Received: from aurel32 by ohm.aurel32.net with local (Exim 4.87) (envelope-from ) id 1atAIA-0003sE-5y; Thu, 21 Apr 2016 10:48:54 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Thu, 21 Apr 2016 10:48:49 +0200 Message-Id: <1461228530-14852-1-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 2.8.0.rc3 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:bc8:30d7:100::1 Subject: [Qemu-devel] [PATCH 1/2] tcg: use tcg_debug_assert instead of assert (fix performance regression) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The TCG code is quite performance sensitive, but at the same time can also be quite tricky. That is why asserts that can be enabled with the --enable-debug-tcg configure option. This used to work the following way: | #include "config.h" | | ... | | #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) | /* define it to suppress various consistency checks (faster) */ | #define NDEBUG | #endif | | ... | | #include Since commit 757e725b (tcg: Clean up includes) "config.h" as been replaced by "qemu/osdep.h" which itself includes . As a consequence the assertions are always enabled, even when using --disable-debug-tcg, causing a performance regression, especially on targets with many registers. For instance on qemu-system-ppc the speed difference is about 15%. tcg_debug_assert is controlled directly by CONFIG_DEBUG_TCG and already uses in some places. This patch replaces all the calls to assert into calss to tcg_debug_assert. Cc: Peter Maydell Cc: Richard Henderson Signed-off-by: Aurelien Jarno Reviewed-by: Peter Maydell --- tcg/aarch64/tcg-target.inc.c | 24 ++++++++++++------------ tcg/arm/tcg-target.inc.c | 12 ++++++------ tcg/i386/tcg-target.inc.c | 8 ++++---- tcg/ia64/tcg-target.inc.c | 6 +++--- tcg/mips/tcg-target.inc.c | 18 +++++++++--------- tcg/optimize.c | 4 ++-- tcg/ppc/tcg-target.inc.c | 22 +++++++++++----------- tcg/s390/tcg-target.inc.c | 6 +++--- tcg/sparc/tcg-target.inc.c | 8 ++++---- tcg/tcg.c | 36 ++++++++++++++++++------------------ tcg/tci/tcg-target.inc.c | 42 +++++++++++++++++++++--------------------- 11 files changed, 93 insertions(+), 93 deletions(-) diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index 0ed10a9..f5f0ce3 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -67,7 +67,7 @@ static const int tcg_target_call_oarg_regs[1] = { static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) { ptrdiff_t offset = target - code_ptr; - assert(offset == sextract64(offset, 0, 26)); + tcg_debug_assert(offset == sextract64(offset, 0, 26)); /* read instruction, mask away previous PC_REL26 parameter contents, set the proper offset, then write back the instruction. */ *code_ptr = deposit32(*code_ptr, 0, 26, offset); @@ -76,14 +76,14 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) { ptrdiff_t offset = target - code_ptr; - assert(offset == sextract64(offset, 0, 19)); + tcg_debug_assert(offset == sextract64(offset, 0, 19)); *code_ptr = deposit32(*code_ptr, 5, 19, offset); } static inline void patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { - assert(addend == 0); + tcg_debug_assert(addend == 0); switch (type) { case R_AARCH64_JUMP26: case R_AARCH64_CALL26: @@ -402,7 +402,7 @@ static void tcg_out_insn_3314(TCGContext *s, AArch64Insn insn, insn |= pre << 24; insn |= w << 23; - assert(ofs >= -0x200 && ofs < 0x200 && (ofs & 7) == 0); + tcg_debug_assert(ofs >= -0x200 && ofs < 0x200 && (ofs & 7) == 0); insn |= (ofs & (0x7f << 3)) << (15 - 3); tcg_out32(s, insn | r2 << 10 | rn << 5 | r1); @@ -412,9 +412,9 @@ static void tcg_out_insn_3401(TCGContext *s, AArch64Insn insn, TCGType ext, TCGReg rd, TCGReg rn, uint64_t aimm) { if (aimm > 0xfff) { - assert((aimm & 0xfff) == 0); + tcg_debug_assert((aimm & 0xfff) == 0); aimm >>= 12; - assert(aimm <= 0xfff); + tcg_debug_assert(aimm <= 0xfff); aimm |= 1 << 12; /* apply LSL 12 */ } tcg_out32(s, insn | ext << 31 | aimm << 10 | rn << 5 | rd); @@ -444,7 +444,7 @@ static void tcg_out_insn_3403(TCGContext *s, AArch64Insn insn, TCGType ext, static void tcg_out_insn_3405(TCGContext *s, AArch64Insn insn, TCGType ext, TCGReg rd, uint16_t half, unsigned shift) { - assert((shift & ~0x30) == 0); + tcg_debug_assert((shift & ~0x30) == 0); tcg_out32(s, insn | ext << 31 | shift << (21 - 4) | half << 5 | rd); } @@ -538,7 +538,7 @@ static void tcg_out_logicali(TCGContext *s, AArch64Insn insn, TCGType ext, { unsigned h, l, r, c; - assert(is_limm(limm)); + tcg_debug_assert(is_limm(limm)); h = clz64(limm); l = ctz64(limm); @@ -793,7 +793,7 @@ static void tcg_out_cmp(TCGContext *s, TCGType ext, TCGReg a, static inline void tcg_out_goto(TCGContext *s, tcg_insn_unit *target) { ptrdiff_t offset = target - s->code_ptr; - assert(offset == sextract64(offset, 0, 26)); + tcg_debug_assert(offset == sextract64(offset, 0, 26)); tcg_out_insn(s, 3206, B, offset); } @@ -867,7 +867,7 @@ static void tcg_out_brcond(TCGContext *s, TCGMemOp ext, TCGCond c, TCGArg a, offset = tcg_in32(s) >> 5; } else { offset = l->u.value_ptr - s->code_ptr; - assert(offset == sextract64(offset, 0, 19)); + tcg_debug_assert(offset == sextract64(offset, 0, 19)); } if (need_cmp) { @@ -990,7 +990,7 @@ static void * const qemu_st_helpers[16] = { static inline void tcg_out_adr(TCGContext *s, TCGReg rd, void *target) { ptrdiff_t offset = tcg_pcrel_diff(s, target); - assert(offset == sextract64(offset, 0, 21)); + tcg_debug_assert(offset == sextract64(offset, 0, 21)); tcg_out_insn(s, 3406, ADR, rd, offset); } @@ -1294,7 +1294,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, #ifndef USE_DIRECT_JUMP #error "USE_DIRECT_JUMP required for aarch64" #endif - assert(s->tb_jmp_offset != NULL); /* consistency for USE_DIRECT_JUMP */ + tcg_debug_assert(s->tb_jmp_offset != NULL); /* consistency for USE_DIRECT_JUMP */ s->tb_jmp_offset[a0] = tcg_current_code_size(s); /* actual branch destination will be patched by aarch64_tb_set_jmp_target later, beware retranslation. */ diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index 3edf6a6..9995b74 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -124,8 +124,8 @@ static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target) static void patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { - assert(type == R_ARM_PC24); - assert(addend == 0); + tcg_debug_assert(type == R_ARM_PC24); + tcg_debug_assert(addend == 0); reloc_pc24(code_ptr, (tcg_insn_unit *)value); } @@ -492,7 +492,7 @@ static inline void tcg_out_dat_rI(TCGContext *s, int cond, int opc, TCGArg dst, */ if (rhs_is_const) { int rot = encode_imm(rhs); - assert(rot >= 0); + tcg_debug_assert(rot >= 0); tcg_out_dat_imm(s, cond, opc, dst, lhs, rotl(rhs, rot) | (rot << 7)); } else { tcg_out_dat_reg(s, cond, opc, dst, lhs, rhs, SHIFT_IMM_LSL(0)); @@ -511,7 +511,7 @@ static void tcg_out_dat_rIK(TCGContext *s, int cond, int opc, int opinv, if (rot < 0) { rhs = ~rhs; rot = encode_imm(rhs); - assert(rot >= 0); + tcg_debug_assert(rot >= 0); opc = opinv; } tcg_out_dat_imm(s, cond, opc, dst, lhs, rotl(rhs, rot) | (rot << 7)); @@ -532,7 +532,7 @@ static void tcg_out_dat_rIN(TCGContext *s, int cond, int opc, int opneg, if (rot < 0) { rhs = -rhs; rot = encode_imm(rhs); - assert(rot >= 0); + tcg_debug_assert(rot >= 0); opc = opneg; } tcg_out_dat_imm(s, cond, opc, dst, lhs, rotl(rhs, rot) | (rot << 7)); @@ -1100,7 +1100,7 @@ static TCGReg NAME(TCGContext *s, TCGReg argreg, ARGTYPE arg) \ } else { \ int ofs = (argreg - 4) * 4; \ EXT_ARG; \ - assert(ofs + 4 <= TCG_STATIC_CALL_ARGS_SIZE); \ + tcg_debug_assert(ofs + 4 <= TCG_STATIC_CALL_ARGS_SIZE); \ tcg_out_st32_12(s, COND_AL, arg, TCG_REG_CALL_STACK, ofs); \ } \ return argreg + 1; \ diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 9187d34..65f0d4c 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -425,7 +425,7 @@ static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x) } if (opc & P_DATA16) { /* We should never be asking for both 16 and 64-bit operation. */ - assert((opc & P_REXW) == 0); + tcg_debug_assert((opc & P_REXW) == 0); tcg_out8(s, 0x66); } if (opc & P_ADDR32) { @@ -599,7 +599,7 @@ static void tcg_out_modrm_sib_offset(TCGContext *s, int opc, int r, int rm, if (index < 0) { index = 4; } else { - assert(index != TCG_REG_ESP); + tcg_debug_assert(index != TCG_REG_ESP); } tcg_out_opc(s, opc, r, rm, index); @@ -745,14 +745,14 @@ static inline void tcg_out_rolw_8(TCGContext *s, int reg) static inline void tcg_out_ext8u(TCGContext *s, int dest, int src) { /* movzbl */ - assert(src < 4 || TCG_TARGET_REG_BITS == 64); + tcg_debug_assert(src < 4 || TCG_TARGET_REG_BITS == 64); tcg_out_modrm(s, OPC_MOVZBL + P_REXB_RM, dest, src); } static void tcg_out_ext8s(TCGContext *s, int dest, int src, int rexw) { /* movsbl */ - assert(src < 4 || TCG_TARGET_REG_BITS == 64); + tcg_debug_assert(src < 4 || TCG_TARGET_REG_BITS == 64); tcg_out_modrm(s, OPC_MOVSBL + P_REXB_RM + rexw, dest, src); } diff --git a/tcg/ia64/tcg-target.inc.c b/tcg/ia64/tcg-target.inc.c index 62d6549..5233da1 100644 --- a/tcg/ia64/tcg-target.inc.c +++ b/tcg/ia64/tcg-target.inc.c @@ -710,8 +710,8 @@ static uint64_t get_reloc_pcrel21b_slot2(tcg_insn_unit *pc) static void patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { - assert(addend == 0); - assert(type == R_IA64_PCREL21B); + tcg_debug_assert(addend == 0); + tcg_debug_assert(type == R_IA64_PCREL21B); reloc_pcrel21b_slot2(code_ptr, (tcg_insn_unit *)value); } @@ -809,7 +809,7 @@ static inline void tcg_out_mov(TCGContext *s, TCGType type, static inline uint64_t tcg_opc_movi_a(int qp, TCGReg dst, int64_t src) { - assert(src == sextract64(src, 0, 22)); + tcg_debug_assert(src == sextract64(src, 0, 22)); return tcg_opc_a5(qp, OPC_ADDL_A5, dst, src, TCG_REG_R0); } diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 682e198..f7194b6 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -127,7 +127,7 @@ static inline uint32_t reloc_pc16_val(tcg_insn_unit *pc, tcg_insn_unit *target) { /* Let the compiler perform the right-shift as part of the arithmetic. */ ptrdiff_t disp = target - (pc + 1); - assert(disp == (int16_t)disp); + tcg_debug_assert(disp == (int16_t)disp); return disp & 0xffff; } @@ -138,7 +138,7 @@ static inline void reloc_pc16(tcg_insn_unit *pc, tcg_insn_unit *target) static inline uint32_t reloc_26_val(tcg_insn_unit *pc, tcg_insn_unit *target) { - assert((((uintptr_t)pc ^ (uintptr_t)target) & 0xf0000000) == 0); + tcg_debug_assert((((uintptr_t)pc ^ (uintptr_t)target) & 0xf0000000) == 0); return ((uintptr_t)target >> 2) & 0x3ffffff; } @@ -150,8 +150,8 @@ static inline void reloc_26(tcg_insn_unit *pc, tcg_insn_unit *target) static void patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { - assert(type == R_MIPS_PC16); - assert(addend == 0); + tcg_debug_assert(type == R_MIPS_PC16); + tcg_debug_assert(addend == 0); reloc_pc16(code_ptr, (tcg_insn_unit *)value); } @@ -432,7 +432,7 @@ static bool tcg_out_opc_jmp(TCGContext *s, MIPSInsn opc, void *target) if ((from ^ dest) & -(1 << 28)) { return false; } - assert((dest & 3) == 0); + tcg_debug_assert((dest & 3) == 0); inst = opc; inst |= (dest >> 2) & 0x3ffffff; @@ -807,9 +807,9 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret, TCGReg tmp0 = TCG_TMP0; TCGReg tmp1 = ret; - assert(ret != TCG_TMP0); + tcg_debug_assert(ret != TCG_TMP0); if (ret == ah || ret == bh) { - assert(ret != TCG_TMP1); + tcg_debug_assert(ret != TCG_TMP1); tmp1 = TCG_TMP1; } @@ -1470,8 +1470,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_and_i32: if (c2 && a2 != (uint16_t)a2) { int msb = ctz32(~a2) - 1; - assert(use_mips32r2_instructions); - assert(is_p2m1(a2)); + tcg_debug_assert(use_mips32r2_instructions); + tcg_debug_assert(is_p2m1(a2)); tcg_out_opc_bf(s, OPC_EXT, a0, a1, msb, 0); break; } diff --git a/tcg/optimize.c b/tcg/optimize.c index 6d68f57..f011608 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -959,12 +959,12 @@ void tcg_optimize(TCGContext *s) } if (partmask == 0) { - assert(nb_oargs == 1); + tcg_debug_assert(nb_oargs == 1); tcg_opt_gen_movi(s, op, args, args[0], 0); continue; } if (affected == 0) { - assert(nb_oargs == 1); + tcg_debug_assert(nb_oargs == 1); tcg_opt_gen_mov(s, op, args, args[0], args[1]); continue; } diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 8c1c2df..60bcaa7 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -207,7 +207,7 @@ static inline bool in_range_b(tcg_target_long target) static uint32_t reloc_pc24_val(tcg_insn_unit *pc, tcg_insn_unit *target) { ptrdiff_t disp = tcg_ptr_byte_diff(target, pc); - assert(in_range_b(disp)); + tcg_debug_assert(in_range_b(disp)); return disp & 0x3fffffc; } @@ -219,7 +219,7 @@ static void reloc_pc24(tcg_insn_unit *pc, tcg_insn_unit *target) static uint16_t reloc_pc14_val(tcg_insn_unit *pc, tcg_insn_unit *target) { ptrdiff_t disp = tcg_ptr_byte_diff(target, pc); - assert(disp == (int16_t) disp); + tcg_debug_assert(disp == (int16_t) disp); return disp & 0xfffc; } @@ -245,7 +245,7 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, { tcg_insn_unit *target = (tcg_insn_unit *)value; - assert(addend == 0); + tcg_debug_assert(addend == 0); switch (type) { case R_PPC_REL14: reloc_pc14(code_ptr, target); @@ -565,7 +565,7 @@ static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) static inline void tcg_out_rld(TCGContext *s, int op, TCGReg ra, TCGReg rs, int sh, int mb) { - assert(TCG_TARGET_REG_BITS == 64); + tcg_debug_assert(TCG_TARGET_REG_BITS == 64); sh = SH(sh & 0x1f) | (((sh >> 5) & 1) << 1); mb = MB64((mb >> 5) | ((mb << 1) & 0x3f)); tcg_out32(s, op | RA(ra) | RS(rs) | sh | mb); @@ -718,7 +718,7 @@ static void tcg_out_andi64(TCGContext *s, TCGReg dst, TCGReg src, uint64_t c) { int mb, me; - assert(TCG_TARGET_REG_BITS == 64); + tcg_debug_assert(TCG_TARGET_REG_BITS == 64); if (mask64_operand(c, &mb, &me)) { if (mb == 0) { tcg_out_rld(s, RLDICR, dst, src, 0, me); @@ -834,7 +834,7 @@ static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, { int opi, opx; - assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32); + tcg_debug_assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32); if (type == TCG_TYPE_I32) { opi = LWZ, opx = LWZX; } else { @@ -848,7 +848,7 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, { int opi, opx; - assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32); + tcg_debug_assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32); if (type == TCG_TYPE_I32) { opi = STW, opx = STWX; } else { @@ -981,7 +981,7 @@ static void tcg_out_setcond(TCGContext *s, TCGType type, TCGCond cond, { int crop, sh; - assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32); + tcg_debug_assert(TCG_TARGET_REG_BITS == 64 || type == TCG_TYPE_I32); /* Ignore high bits of a potential constant arg2. */ if (type == TCG_TYPE_I32) { @@ -1251,11 +1251,11 @@ void ppc_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr) diff = addr - (uintptr_t)tb_ret_addr; lo = (int16_t)diff; hi = (int32_t)(diff - lo); - assert(diff == hi + lo); + tcg_debug_assert(diff == hi + lo); i1 = ADDIS | TAI(TCG_REG_TMP1, TCG_REG_RA, hi >> 16); i2 = ADDI | TAI(TCG_REG_TMP1, TCG_REG_TMP1, lo); } else { - assert(TCG_TARGET_REG_BITS == 32 || addr == (int32_t)addr); + tcg_debug_assert(TCG_TARGET_REG_BITS == 32 || addr == (int32_t)addr); i1 = ADDIS | TAI(TCG_REG_TMP1, 0, addr >> 16); i2 = ORI | SAI(TCG_REG_TMP1, TCG_REG_TMP1, addr); } @@ -1857,7 +1857,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) } /* Epilogue */ - assert(tb_ret_addr == s->code_ptr); + tcg_debug_assert(tb_ret_addr == s->code_ptr); tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R0, TCG_REG_R1, FRAME_SIZE+LR_OFFSET); for (i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); ++i) { diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index fbf97bb..8b30256 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -348,15 +348,15 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { intptr_t pcrel2 = (tcg_insn_unit *)value - (code_ptr - 1); - assert(addend == -2); + tcg_debug_assert(addend == -2); switch (type) { case R_390_PC16DBL: - assert(pcrel2 == (int16_t)pcrel2); + tcg_debug_assert(pcrel2 == (int16_t)pcrel2); tcg_patch16(code_ptr, pcrel2); break; case R_390_PC32DBL: - assert(pcrel2 == (int32_t)pcrel2); + tcg_debug_assert(pcrel2 == (int32_t)pcrel2); tcg_patch32(code_ptr, pcrel2); break; default: diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c index 54df1bc..d64daba 100644 --- a/tcg/sparc/tcg-target.inc.c +++ b/tcg/sparc/tcg-target.inc.c @@ -289,7 +289,7 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, { uint32_t insn; - assert(addend == 0); + tcg_debug_assert(addend == 0); value = tcg_ptr_byte_diff((tcg_insn_unit *)value, code_ptr); switch (type) { @@ -1108,7 +1108,7 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data, TCGReg addr, } else { func = qemu_ld_trampoline[memop & (MO_BSWAP | MO_SSIZE)]; } - assert(func != NULL); + tcg_debug_assert(func != NULL); tcg_out_call_nodelay(s, func); /* delay slot */ tcg_out_movi(s, TCG_TYPE_I32, param, oi); @@ -1187,7 +1187,7 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data, TCGReg addr, tcg_out_mov(s, TCG_TYPE_REG, param++, data); func = qemu_st_trampoline[memop & (MO_BSWAP | MO_SIZE)]; - assert(func != NULL); + tcg_debug_assert(func != NULL); tcg_out_call_nodelay(s, func); /* delay slot */ tcg_out_movi(s, TCG_TYPE_I32, param, oi); @@ -1645,7 +1645,7 @@ void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr) /* We can reach the entire address space for 32-bit. For 64-bit the code_gen_buffer can't be larger than 2GB. */ - assert(disp == (int32_t)disp); + tcg_debug_assert(disp == (int32_t)disp); *ptr = CALL | (uint32_t)disp >> 2; flush_icache_range(jmp_addr, jmp_addr + 4); diff --git a/tcg/tcg.c b/tcg/tcg.c index b46bf1a..525d5c8 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -229,7 +229,7 @@ static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr) intptr_t value = (intptr_t)ptr; TCGRelocation *r; - assert(!l->has_value); + tcg_debug_assert(!l->has_value); for (r = l->u.first_reloc; r != NULL; r = r->next) { patch_reloc(r->ptr, r->type, value, r->addend); @@ -645,9 +645,9 @@ static void tcg_temp_free_internal(int idx) } #endif - assert(idx >= s->nb_globals && idx < s->nb_temps); + tcg_debug_assert(idx >= s->nb_globals && idx < s->nb_temps); ts = &s->temps[idx]; - assert(ts->temp_allocated != 0); + tcg_debug_assert(ts->temp_allocated != 0); ts->temp_allocated = 0; k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0); @@ -948,7 +948,7 @@ static char *tcg_get_arg_str_ptr(TCGContext *s, char *buf, int buf_size, static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size, int idx) { - assert(idx >= 0 && idx < s->nb_temps); + tcg_debug_assert(idx >= 0 && idx < s->nb_temps); return tcg_get_arg_str_ptr(s, buf, buf_size, &s->temps[idx]); } @@ -1191,25 +1191,25 @@ void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) if (tdefs->op == (TCGOpcode)-1) break; op = tdefs->op; - assert((unsigned)op < NB_OPS); + tcg_debug_assert((unsigned)op < NB_OPS); def = &tcg_op_defs[op]; #if defined(CONFIG_DEBUG_TCG) /* Duplicate entry in op definitions? */ - assert(!def->used); + tcg_debug_assert(!def->used); def->used = 1; #endif nb_args = def->nb_iargs + def->nb_oargs; for(i = 0; i < nb_args; i++) { ct_str = tdefs->args_ct_str[i]; /* Incomplete TCGTargetOpDef entry? */ - assert(ct_str != NULL); + tcg_debug_assert(ct_str != NULL); tcg_regset_clear(def->args_ct[i].u.regs); def->args_ct[i].ct = 0; if (ct_str[0] >= '0' && ct_str[0] <= '9') { int oarg; oarg = ct_str[0] - '0'; - assert(oarg < def->nb_oargs); - assert(def->args_ct[oarg].ct & TCG_CT_REG); + tcg_debug_assert(oarg < def->nb_oargs); + tcg_debug_assert(def->args_ct[oarg].ct & TCG_CT_REG); /* TCG_CT_ALIAS is for the output arguments. The input argument is tagged with TCG_CT_IALIAS. */ def->args_ct[i] = def->args_ct[oarg]; @@ -1238,7 +1238,7 @@ void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) } /* TCGTargetOpDef entry with too much information? */ - assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); + tcg_debug_assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); /* sort the constraints (XXX: this is just an heuristic) */ sort_constraints(def, 0, def->nb_oargs); @@ -1685,7 +1685,7 @@ static void tcg_reg_sync(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs) { TCGTemp *ts = s->reg_to_temp[reg]; - assert(ts->val_type == TEMP_VAL_REG); + tcg_debug_assert(ts->val_type == TEMP_VAL_REG); if (!ts->mem_coherent && !ts->fixed_reg) { if (!ts->mem_allocated) { temp_allocate_frame(s, temp_idx(s, ts)); @@ -1822,7 +1822,7 @@ static inline void temp_save(TCGContext *s, TCGTemp *ts, /* ??? Liveness does not yet incorporate indirect bases. */ if (!ts->indirect_base) { /* The liveness analysis already ensures that globals are back - in memory. Keep an assert for safety. */ + in memory. Keep an tcg_debug_assert for safety. */ tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg); return; } @@ -1880,8 +1880,8 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) /* ??? Liveness does not yet incorporate indirect bases. */ if (!ts->indirect_base) { /* The liveness analysis already ensures that temps are dead. - Keep an assert for safety. */ - assert(ts->val_type == TEMP_VAL_DEAD); + Keep an tcg_debug_assert for safety. */ + tcg_debug_assert(ts->val_type == TEMP_VAL_DEAD); continue; } #endif @@ -1952,9 +1952,9 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, if (IS_DEAD_ARG(0) && !ots->fixed_reg) { /* mov to a non-saved dead register makes no sense (even with liveness analysis disabled). */ - assert(NEED_SYNC_ARG(0)); + tcg_debug_assert(NEED_SYNC_ARG(0)); /* The code above should have moved the temp to a register. */ - assert(ts->val_type == TEMP_VAL_REG); + tcg_debug_assert(ts->val_type == TEMP_VAL_REG); if (!ots->mem_allocated) { temp_allocate_frame(s, args[0]); } @@ -1982,7 +1982,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, } else { /* The code in the first if block should have moved the temp to a register. */ - assert(ts->val_type == TEMP_VAL_REG); + tcg_debug_assert(ts->val_type == TEMP_VAL_REG); if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) { /* the mov can be suppressed */ if (ots->val_type == TEMP_VAL_REG) { @@ -2283,7 +2283,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs, arg = args[i]; ts = &s->temps[arg]; reg = tcg_target_call_oarg_regs[i]; - assert(s->reg_to_temp[reg] == NULL); + tcg_debug_assert(s->reg_to_temp[reg] == NULL); if (ts->fixed_reg) { if (ts->reg != reg) { diff --git a/tcg/tci/tcg-target.inc.c b/tcg/tci/tcg-target.inc.c index 4afe4d7..6855ed2 100644 --- a/tcg/tci/tcg-target.inc.c +++ b/tcg/tci/tcg-target.inc.c @@ -360,9 +360,9 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { /* tcg_out_reloc always uses the same type, addend. */ - assert(type == sizeof(tcg_target_long)); - assert(addend == 0); - assert(value != 0); + tcg_debug_assert(type == sizeof(tcg_target_long)); + tcg_debug_assert(addend == 0); + tcg_debug_assert(value != 0); if (TCG_TARGET_REG_BITS == 32) { tcg_patch32(code_ptr, value); } else { @@ -419,7 +419,7 @@ static void tcg_out_op_t(TCGContext *s, TCGOpcode op) /* Write register. */ static void tcg_out_r(TCGContext *s, TCGArg t0) { - assert(t0 < TCG_TARGET_NB_REGS); + tcg_debug_assert(t0 < TCG_TARGET_NB_REGS); tcg_out8(s, t0); } @@ -427,7 +427,7 @@ static void tcg_out_r(TCGContext *s, TCGArg t0) static void tcg_out_ri(TCGContext *s, int const_arg, TCGArg arg) { if (const_arg) { - assert(const_arg == 1); + tcg_debug_assert(const_arg == 1); tcg_out8(s, TCG_CONST); tcg_out_i(s, arg); } else { @@ -439,7 +439,7 @@ static void tcg_out_ri(TCGContext *s, int const_arg, TCGArg arg) static void tcg_out_ri32(TCGContext *s, int const_arg, TCGArg arg) { if (const_arg) { - assert(const_arg == 1); + tcg_debug_assert(const_arg == 1); tcg_out8(s, TCG_CONST); tcg_out32(s, arg); } else { @@ -452,7 +452,7 @@ static void tcg_out_ri32(TCGContext *s, int const_arg, TCGArg arg) static void tcg_out_ri64(TCGContext *s, int const_arg, TCGArg arg) { if (const_arg) { - assert(const_arg == 1); + tcg_debug_assert(const_arg == 1); tcg_out8(s, TCG_CONST); tcg_out64(s, arg); } else { @@ -466,7 +466,7 @@ static void tci_out_label(TCGContext *s, TCGLabel *label) { if (label->has_value) { tcg_out_i(s, label->u.value); - assert(label->u.value); + tcg_debug_assert(label->u.value); } else { tcg_out_reloc(s, s->code_ptr, sizeof(tcg_target_ulong), label, 0); s->code_ptr += sizeof(tcg_target_ulong); @@ -483,12 +483,12 @@ static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, tcg_out_r(s, arg1); tcg_out32(s, arg2); } else { - assert(type == TCG_TYPE_I64); + tcg_debug_assert(type == TCG_TYPE_I64); #if TCG_TARGET_REG_BITS == 64 tcg_out_op_t(s, INDEX_op_ld_i64); tcg_out_r(s, ret); tcg_out_r(s, arg1); - assert(arg2 == (int32_t)arg2); + tcg_debug_assert(arg2 == (int32_t)arg2); tcg_out32(s, arg2); #else TODO(); @@ -500,7 +500,7 @@ static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) { uint8_t *old_code_ptr = s->code_ptr; - assert(ret != arg); + tcg_debug_assert(ret != arg); #if TCG_TARGET_REG_BITS == 32 tcg_out_op_t(s, INDEX_op_mov_i32); #else @@ -521,7 +521,7 @@ static void tcg_out_movi(TCGContext *s, TCGType type, tcg_out_r(s, t0); tcg_out32(s, arg32); } else { - assert(type == TCG_TYPE_I64); + tcg_debug_assert(type == TCG_TYPE_I64); #if TCG_TARGET_REG_BITS == 64 tcg_out_op_t(s, INDEX_op_movi_i64); tcg_out_r(s, t0); @@ -555,14 +555,14 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_goto_tb: if (s->tb_jmp_offset) { /* Direct jump method. */ - assert(args[0] < ARRAY_SIZE(s->tb_jmp_offset)); + tcg_debug_assert(args[0] < ARRAY_SIZE(s->tb_jmp_offset)); s->tb_jmp_offset[args[0]] = tcg_current_code_size(s); tcg_out32(s, 0); } else { /* Indirect jump method. */ TODO(); } - assert(args[0] < ARRAY_SIZE(s->tb_next_offset)); + tcg_debug_assert(args[0] < ARRAY_SIZE(s->tb_next_offset)); s->tb_next_offset[args[0]] = tcg_current_code_size(s); break; case INDEX_op_br: @@ -613,7 +613,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_st_i64: tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); - assert(args[2] == (int32_t)args[2]); + tcg_debug_assert(args[2] == (int32_t)args[2]); tcg_out32(s, args[2]); break; case INDEX_op_add_i32: @@ -640,9 +640,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); - assert(args[3] <= UINT8_MAX); + tcg_debug_assert(args[3] <= UINT8_MAX); tcg_out8(s, args[3]); - assert(args[4] <= UINT8_MAX); + tcg_debug_assert(args[4] <= UINT8_MAX); tcg_out8(s, args[4]); break; @@ -671,9 +671,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); - assert(args[3] <= UINT8_MAX); + tcg_debug_assert(args[3] <= UINT8_MAX); tcg_out8(s, args[3]); - assert(args[4] <= UINT8_MAX); + tcg_debug_assert(args[4] <= UINT8_MAX); tcg_out8(s, args[4]); break; case INDEX_op_div_i64: /* Optional (TCG_TARGET_HAS_div_i64). */ @@ -819,7 +819,7 @@ static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, tcg_out_r(s, arg1); tcg_out32(s, arg2); } else { - assert(type == TCG_TYPE_I64); + tcg_debug_assert(type == TCG_TYPE_I64); #if TCG_TARGET_REG_BITS == 64 tcg_out_op_t(s, INDEX_op_st_i64); tcg_out_r(s, arg); @@ -850,7 +850,7 @@ static void tcg_target_init(TCGContext *s) #endif /* The current code uses uint8_t for tcg operations. */ - assert(tcg_op_defs_max <= UINT8_MAX); + tcg_debug_assert(tcg_op_defs_max <= UINT8_MAX); /* Registers available for 32 bit operations. */ tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0,