From patchwork Sun Apr 24 22:12:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Kiarie X-Patchwork-Id: 8921921 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 411E69F1D3 for ; Sun, 24 Apr 2016 22:15:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 93130200F2 for ; Sun, 24 Apr 2016 22:15:09 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E456B200ED for ; Sun, 24 Apr 2016 22:15:08 +0000 (UTC) Received: from localhost ([::1]:56843 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1auSJ1-0000bk-VZ for patchwork-qemu-devel@patchwork.kernel.org; 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} +static void mch_init_amdvi(MCHPCIState *mch) +{ + AMDIOMMUState *iommu_state; + PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch))); + PCIDevice *iommu; + + iommu = pci_create_simple(bus, 0x20, TYPE_AMD_IOMMU_DEVICE); + + iommu_state = AMD_IOMMU_DEVICE(iommu); + + pci_setup_iommu(bus, bridge_host_amd_iommu, iommu_state); +} + static void mch_realize(PCIDevice *d, Error **errp) { int i; @@ -506,8 +520,11 @@ static void mch_realize(PCIDevice *d, Error **errp) mch->pci_address_space, &mch->pam_regions[i+1], PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); } - /* Intel IOMMU (VT-d) */ - if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) { + + if (object_property_get_bool(qdev_get_machine(), "iommu", NULL) && + MACHINE(qdev_get_machine())->x_iommu_type) { + mch_init_amdvi(mch); + } else if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) { mch_init_dmar(mch); } } diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index 7e511e1..539530c 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -24,10 +24,10 @@ #include "hw/qdev.h" #include "sysemu/dma.h" -#define INTEL_IOMMU_STR "intel" #define TYPE_INTEL_IOMMU_DEVICE "intel-iommu" #define INTEL_IOMMU_DEVICE(obj) \ OBJECT_CHECK(IntelIOMMUState, (obj), TYPE_INTEL_IOMMU_DEVICE) +#define INTEL_IOMMU_STR "intel" /* DMAR Hardware Unit Definition address (IOMMU unit) */ #define Q35_HOST_BRIDGE_IOMMU_ADDR 0xfed90000ULL