| Message ID | 1462875073-7127-1-git-send-email-peter.maydell@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 10/05/16 13:11, Peter Maydell wrote: > The TCR_EL2 and TCR_EL3 regdefs wer incorrectly using the s/wer/were/ otherwise: Reviewed-by: Sergey Fedorov <sergey.fedorov@linaro.org> Kind regards, Sergey > vmsa_tcr_el1_write function for writes. Since these registers don't > have the A1 bit that TCR_EL1 does, we don't need to do a tlb_flush() > when they are written. Remove the unnecessary .writefn and also the > harmless but unneeded .raw_writefn and .resetfn definitions. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > v1->v2 changes: extend to TCR_EL3 as suggested by Sergey. > > target-arm/helper.c | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 09638b2..cbb9d92 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -3559,8 +3559,10 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { > .resetvalue = 0 }, > { .name = "TCR_EL2", .state = ARM_CP_STATE_BOTH, > .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 2, > - .access = PL2_RW, .writefn = vmsa_tcr_el1_write, > - .resetfn = vmsa_ttbcr_reset, .raw_writefn = raw_write, > + .access = PL2_RW, > + /* no .writefn needed as this can't cause an ASID change; > + * no .raw_writefn or .resetfn needed as we never use mask/base_mask > + */ > .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[2]) }, > { .name = "VTCR", .state = ARM_CP_STATE_AA32, > .cp = 15, .opc1 = 4, .crn = 2, .crm = 1, .opc2 = 2, > @@ -3753,8 +3755,10 @@ static const ARMCPRegInfo el3_cp_reginfo[] = { > .fieldoffset = offsetof(CPUARMState, cp15.ttbr0_el[3]) }, > { .name = "TCR_EL3", .state = ARM_CP_STATE_AA64, > .opc0 = 3, .opc1 = 6, .crn = 2, .crm = 0, .opc2 = 2, > - .access = PL3_RW, .writefn = vmsa_tcr_el1_write, > - .resetfn = vmsa_ttbcr_reset, .raw_writefn = raw_write, > + .access = PL3_RW, > + /* no .writefn needed as this can't cause an ASID change; > + * no .raw_writefn or .resetfn needed as we never use mask/base_mask > + */ > .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[3]) }, > { .name = "ELR_EL3", .state = ARM_CP_STATE_AA64, > .type = ARM_CP_ALIAS,
diff --git a/target-arm/helper.c b/target-arm/helper.c index 09638b2..cbb9d92 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3559,8 +3559,10 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { .resetvalue = 0 }, { .name = "TCR_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 2, - .access = PL2_RW, .writefn = vmsa_tcr_el1_write, - .resetfn = vmsa_ttbcr_reset, .raw_writefn = raw_write, + .access = PL2_RW, + /* no .writefn needed as this can't cause an ASID change; + * no .raw_writefn or .resetfn needed as we never use mask/base_mask + */ .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[2]) }, { .name = "VTCR", .state = ARM_CP_STATE_AA32, .cp = 15, .opc1 = 4, .crn = 2, .crm = 1, .opc2 = 2, @@ -3753,8 +3755,10 @@ static const ARMCPRegInfo el3_cp_reginfo[] = { .fieldoffset = offsetof(CPUARMState, cp15.ttbr0_el[3]) }, { .name = "TCR_EL3", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 6, .crn = 2, .crm = 0, .opc2 = 2, - .access = PL3_RW, .writefn = vmsa_tcr_el1_write, - .resetfn = vmsa_ttbcr_reset, .raw_writefn = raw_write, + .access = PL3_RW, + /* no .writefn needed as this can't cause an ASID change; + * no .raw_writefn or .resetfn needed as we never use mask/base_mask + */ .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[3]) }, { .name = "ELR_EL3", .state = ARM_CP_STATE_AA64, .type = ARM_CP_ALIAS,
The TCR_EL2 and TCR_EL3 regdefs wer incorrectly using the vmsa_tcr_el1_write function for writes. Since these registers don't have the A1 bit that TCR_EL1 does, we don't need to do a tlb_flush() when they are written. Remove the unnecessary .writefn and also the harmless but unneeded .raw_writefn and .resetfn definitions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- v1->v2 changes: extend to TCR_EL3 as suggested by Sergey. target-arm/helper.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)