From patchwork Wed May 11 19:55:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Llu=C3=ADs_Vilanova?= X-Patchwork-Id: 9075211 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0F019BF29F for ; Wed, 11 May 2016 21:50:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F362A20155 for ; Wed, 11 May 2016 21:50:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A93E1200C6 for ; Wed, 11 May 2016 21:50:39 +0000 (UTC) Received: from localhost ([::1]:54290 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0c1e-000225-Tr for patchwork-qemu-devel@patchwork.kernel.org; Wed, 11 May 2016 17:50:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42923) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0byZ-0003es-6m for qemu-devel@nongnu.org; Wed, 11 May 2016 17:47:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b0byV-0003oh-RW for qemu-devel@nongnu.org; Wed, 11 May 2016 17:47:27 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:60372) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0byN-0003au-2H; Wed, 11 May 2016 17:47:15 -0400 Received: from gw-2.ac.upc.es (gw-2.ac.upc.es [147.83.30.8]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id u4BJteae008413; Wed, 11 May 2016 21:55:40 +0200 Received: from localhost (unknown [84.88.51.85]) by gw-2.ac.upc.es (Postfix) with ESMTPSA id 3D0E158B; Wed, 11 May 2016 21:55:40 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Wed, 11 May 2016 21:55:39 +0200 Message-Id: <146299653947.5203.13161479377215549869.stgit@localhost> X-Mailer: git-send-email 2.8.1 In-Reply-To: <146299653361.5203.4475655460859700214.stgit@localhost> References: <146299653361.5203.4475655460859700214.stgit@localhost> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id u4BJteae008413 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v2 1/2] exec: [tcg] Track which vCPU is performing translation and execution X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Guan Xuetao , Eduardo Habkost , Peter Crosthwaite , Jia Liu , Anthony Green , Mark Cave-Ayland , Alexander Graf , Blue Swirl , Max Filippov , Michael Walle , "open list:ARM" , "open list:PowerPC" , Stefan Hajnoczi , "Edgar E. Iglesias" , Paolo Bonzini , Bastian Koppelmann , Leon Alrae , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Information is tracked inside the TCGContext structure, and later used by tracing events with the 'tcg' and 'vcpu' properties. The 'cpu' field is used to check tracing of translation-time events ("*_trans"). The 'tcg_env' field is used to pass it to execution-time events ("*_exec"). Signed-off-by: Lluís Vilanova Reviewed-by: Peter Maydell --- target-alpha/translate.c | 1 + target-arm/translate.c | 1 + target-cris/translate.c | 1 + target-cris/translate_v10.c | 1 + target-i386/translate.c | 1 + target-lm32/translate.c | 1 + target-m68k/translate.c | 1 + target-microblaze/translate.c | 1 + target-mips/translate.c | 1 + target-moxie/translate.c | 1 + target-openrisc/translate.c | 1 + target-ppc/translate.c | 1 + target-s390x/translate.c | 1 + target-sh4/translate.c | 1 + target-sparc/translate.c | 1 + target-tilegx/translate.c | 1 + target-tricore/translate.c | 1 + target-unicore32/translate.c | 1 + target-xtensa/translate.c | 1 + tcg/tcg.h | 4 ++++ translate-all.c | 2 ++ 21 files changed, 25 insertions(+) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 5b86992..67681f6 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -150,6 +150,7 @@ void alpha_translate_init(void) done_init = 1; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < 31; i++) { cpu_std_ir[i] = tcg_global_mem_new_i64(cpu_env, diff --git a/target-arm/translate.c b/target-arm/translate.c index 940ec8d..1a7496b 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -84,6 +84,7 @@ void arm_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < 16; i++) { cpu_R[i] = tcg_global_mem_new_i32(cpu_env, diff --git a/target-cris/translate.c b/target-cris/translate.c index a73176c..f603af3 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3364,6 +3364,7 @@ void cris_initialize_tcg(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cc_x = tcg_global_mem_new(cpu_env, offsetof(CPUCRISState, cc_x), "cc_x"); cc_src = tcg_global_mem_new(cpu_env, diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index 7607ead..f2e9768 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -1250,6 +1250,7 @@ void cris_initialize_crisv10_tcg(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cc_x = tcg_global_mem_new(cpu_env, offsetof(CPUCRISState, cc_x), "cc_x"); cc_src = tcg_global_mem_new(cpu_env, diff --git a/target-i386/translate.c b/target-i386/translate.c index 1a1214d..7a6ef7c 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -8135,6 +8135,7 @@ void tcg_x86_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_cc_op = tcg_global_mem_new_i32(cpu_env, offsetof(CPUX86State, cc_op), "cc_op"); cpu_cc_dst = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_dst), diff --git a/target-lm32/translate.c b/target-lm32/translate.c index 256a51f..b2e5a3e 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -1191,6 +1191,7 @@ void lm32_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < ARRAY_SIZE(cpu_R); i++) { cpu_R[i] = tcg_global_mem_new(cpu_env, diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 7560c3a..f90f80e 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -77,6 +77,7 @@ void m68k_tcg_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; #define DEFO32(name, offset) \ QREG_##name = tcg_global_mem_new_i32(cpu_env, \ diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index f944965..05092f1 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -1869,6 +1869,7 @@ void mb_tcg_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; env_debug = tcg_global_mem_new(cpu_env, offsetof(CPUMBState, debug), diff --git a/target-mips/translate.c b/target-mips/translate.c index a3a05ec..24f994c 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -19993,6 +19993,7 @@ void mips_tcg_init(void) return; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; TCGV_UNUSED(cpu_gpr[0]); for (i = 1; i < 32; i++) diff --git a/target-moxie/translate.c b/target-moxie/translate.c index a437e2a..44c8c0d 100644 --- a/target-moxie/translate.c +++ b/target-moxie/translate.c @@ -106,6 +106,7 @@ void moxie_translate_init(void) return; } cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_pc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUMoxieState, pc), "$pc"); for (i = 0; i < 16; i++) diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 5d0ab44..170bb40 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -78,6 +78,7 @@ void openrisc_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_sr = tcg_global_mem_new(cpu_env, offsetof(CPUOpenRISCState, sr), "sr"); env_flags = tcg_global_mem_new_i32(cpu_env, diff --git a/target-ppc/translate.c b/target-ppc/translate.c index b3860ec..cf4771b 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -87,6 +87,7 @@ void ppc_translate_init(void) return; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; p = cpu_reg_names; cpu_reg_names_size = sizeof(cpu_reg_names); diff --git a/target-s390x/translate.c b/target-s390x/translate.c index c871ef2..24c1d07 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -168,6 +168,7 @@ void s390x_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; psw_addr = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, psw.addr), "psw_addr"); diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 7c18968..b838386 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -100,6 +100,7 @@ void sh4_translate_init(void) return; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < 24; i++) cpu_gregs[i] = tcg_global_mem_new_i32(cpu_env, diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 7998ff5..f12b878 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -5392,6 +5392,7 @@ void gen_intermediate_code_init(CPUSPARCState *env) inited = 1; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_regwptr = tcg_global_mem_new_ptr(cpu_env, offsetof(CPUSPARCState, regwptr), diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 03918eb..399843a 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -2442,6 +2442,7 @@ void tilegx_tcg_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_pc = tcg_global_mem_new_i64(cpu_env, offsetof(CPUTLGState, pc), "pc"); for (i = 0; i < TILEGX_R_COUNT; i++) { cpu_regs[i] = tcg_global_mem_new_i64(cpu_env, diff --git a/target-tricore/translate.c b/target-tricore/translate.c index 912bf22..7195c4e 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -8823,6 +8823,7 @@ void tricore_tcg_init(void) return; } cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; /* reg init */ for (i = 0 ; i < 16 ; i++) { cpu_gpr_a[i] = tcg_global_mem_new(cpu_env, diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index 39af3af..d2b786e 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -69,6 +69,7 @@ void uc32_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < 32; i++) { cpu_R[i] = tcg_global_mem_new_i32(cpu_env, diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 9894488..0ba59da 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -218,6 +218,7 @@ void xtensa_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_pc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUXtensaState, pc), "pc"); diff --git a/tcg/tcg.h b/tcg/tcg.h index 40c8fbe..89914c2 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -576,6 +576,10 @@ struct TCGContext { TBContext tb_ctx; + /* Track which vCPU triggers events */ + CPUState *cpu; /* *_trans */ + TCGv_env tcg_env; /* *_exec */ + /* The TCGBackendData structure is private to tcg-target.inc.c. */ struct TCGBackendData *be; diff --git a/translate-all.c b/translate-all.c index 8329ea6..1c16b14 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1092,6 +1092,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu, ti = profile_getclock(); #endif + tcg_ctx.cpu = ENV_GET_CPU(env); + tcg_func_start(&tcg_ctx); gen_intermediate_code(env, tb);