From patchwork Thu May 12 03:48:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bharata B Rao X-Patchwork-Id: 9076641 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E3524BF29F for ; Thu, 12 May 2016 03:59:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 002422014A for ; Thu, 12 May 2016 03:59:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C5F4220142 for ; Thu, 12 May 2016 03:59:31 +0000 (UTC) Received: from localhost ([::1]:55298 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0hmc-0006Bt-Vq for patchwork-qemu-devel@patchwork.kernel.org; Wed, 11 May 2016 23:59:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47469) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0hmR-00062s-0X for qemu-devel@nongnu.org; Wed, 11 May 2016 23:59:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b0hmJ-0004yY-2K for qemu-devel@nongnu.org; Wed, 11 May 2016 23:59:18 -0400 Received: from e28smtp07.in.ibm.com ([125.16.236.7]:49694) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0hmI-0004xM-0f for qemu-devel@nongnu.org; Wed, 11 May 2016 23:59:10 -0400 Received: from localhost by e28smtp07.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 12 May 2016 09:18:45 +0530 X-IBM-Helo: d28dlp02.in.ibm.com X-IBM-MailFrom: bharata@linux.vnet.ibm.com X-IBM-RcptTo: qemu-devel@nongnu.org;qemu-ppc@nongnu.org Received: from d28relay07.in.ibm.com (d28relay07.in.ibm.com [9.184.220.158]) by d28dlp02.in.ibm.com (Postfix) with ESMTP id 48B0D394004E; Thu, 12 May 2016 09:18:45 +0530 (IST) Received: from d28av05.in.ibm.com (d28av05.in.ibm.com [9.184.220.67]) by d28relay07.in.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u4C3mjMR19071222; Thu, 12 May 2016 09:18:45 +0530 Received: from d28av05.in.ibm.com (localhost [127.0.0.1]) by d28av05.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id u4C3mfLh014194; Thu, 12 May 2016 09:18:44 +0530 Received: from bharata.in.ibm.com ([9.124.35.211]) by d28av05.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id u4C3mVWT013715; Thu, 12 May 2016 09:18:40 +0530 From: Bharata B Rao To: qemu-devel@nongnu.org Date: Thu, 12 May 2016 09:18:17 +0530 Message-Id: <1463024905-28401-8-git-send-email-bharata@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1463024905-28401-1-git-send-email-bharata@linux.vnet.ibm.com> References: <1463024905-28401-1-git-send-email-bharata@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16051203-0025-0000-0000-00000C23D8E6 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 125.16.236.7 Subject: [Qemu-devel] [for-2.7 PATCH v3 07/15] spapr: Abstract CPU core device and type specific core devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mjrosato@linux.vnet.ibm.com, thuth@redhat.com, pkrempa@redhat.com, ehabkost@redhat.com, aik@ozlabs.ru, Bharata B Rao , armbru@redhat.com, agraf@suse.de, borntraeger@de.ibm.com, qemu-ppc@nongnu.org, pbonzini@redhat.com, imammedo@redhat.com, mdroth@linux.vnet.ibm.com, afaerber@suse.de, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add sPAPR specific abastract CPU core device that is based on generic CPU core device. Use this as base type to create sPAPR CPU specific core devices. TODO: - Add core types for other remaining CPU types - Handle CPU model alias correctly Signed-off-by: Bharata B Rao --- hw/ppc/Makefile.objs | 1 + hw/ppc/spapr.c | 3 +- hw/ppc/spapr_cpu_core.c | 168 ++++++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 1 + include/hw/ppc/spapr_cpu_core.h | 28 +++++++ 5 files changed, 199 insertions(+), 2 deletions(-) create mode 100644 hw/ppc/spapr_cpu_core.c create mode 100644 include/hw/ppc/spapr_cpu_core.h diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index c1ffc77..5cc6608 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -4,6 +4,7 @@ obj-y += ppc.o ppc_booke.o obj-$(CONFIG_PSERIES) += spapr.o spapr_vio.o spapr_events.o obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o obj-$(CONFIG_PSERIES) += spapr_pci.o spapr_rtc.o spapr_drc.o spapr_rng.o +obj-$(CONFIG_PSERIES) += spapr_cpu_core.o ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy) obj-y += spapr_pci_vfio.o endif diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b69995e..95db047 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1605,8 +1605,7 @@ static void spapr_boot_set(void *opaque, const char *boot_device, machine->boot_order = g_strdup(boot_device); } -static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, - Error **errp) +void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp) { CPUPPCState *env = &cpu->env; diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c new file mode 100644 index 0000000..af63ed9 --- /dev/null +++ b/hw/ppc/spapr_cpu_core.c @@ -0,0 +1,168 @@ +/* + * sPAPR CPU core device, acts as container of CPU thread devices. + * + * Copyright (C) 2016 Bharata B Rao + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ +#include "hw/cpu/core.h" +#include "hw/ppc/spapr_cpu_core.h" +#include "hw/ppc/spapr.h" +#include "hw/boards.h" +#include "qapi/error.h" +#include +#include "target-ppc/kvm_ppc.h" + +static void spapr_cpu_core_create_threads(DeviceState *dev, int threads, + Error **errp) +{ + int i; + Error *local_err = NULL; + sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev)); + + for (i = 0; i < threads; i++) { + char id[32]; + + object_initialize(&core->threads[i], sizeof(core->threads[i]), + object_class_get_name(core->cpu)); + snprintf(id, sizeof(id), "thread[%d]", i); + object_property_add_child(OBJECT(core), id, OBJECT(&core->threads[i]), + &local_err); + if (local_err) { + goto err; + } + } + return; + +err: + while (--i) { + object_unparent(OBJECT(&core->threads[i])); + } + error_propagate(errp, local_err); +} + +static int spapr_cpu_core_realize_child(Object *child, void *opaque) +{ + Error **errp = opaque; + sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); + CPUState *cs = CPU(child); + PowerPCCPU *cpu = POWERPC_CPU(cs); + + object_property_set_bool(child, true, "realized", errp); + if (*errp) { + return 1; + } + + spapr_cpu_init(spapr, cpu, errp); + if (*errp) { + return 1; + } + return 0; +} + +static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) +{ + sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); + CPUCore *cc = CPU_CORE(OBJECT(dev)); + Error *local_err = NULL; + + sc->threads = g_new0(PowerPCCPU, cc->threads); + spapr_cpu_core_create_threads(dev, cc->threads, &local_err); + if (local_err) { + goto out; + } + object_child_foreach(OBJECT(dev), spapr_cpu_core_realize_child, &local_err); + +out: + if (local_err) { + g_free(sc->threads); + error_propagate(errp, local_err); + } +} + +static void spapr_cpu_core_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + dc->realize = spapr_cpu_core_realize; +} + +/* + * instance_init routines from different flavours of sPAPR CPU cores. + * TODO: Add support for 'host' core type. + */ +#define SPAPR_CPU_CORE_INITFN(_type, _fname) \ +static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \ +{ \ + sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); \ + char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, stringify(_type)); \ + ObjectClass *oc = object_class_by_name(name); \ + g_assert(oc); \ + g_free((void *)name); \ + core->cpu = oc; \ +} + +SPAPR_CPU_CORE_INITFN(POWER7_v2.3, POWER7); +SPAPR_CPU_CORE_INITFN(POWER7+_v2.1, POWER7plus); +SPAPR_CPU_CORE_INITFN(POWER8_v2.0, POWER8); +SPAPR_CPU_CORE_INITFN(POWER8E_v2.1, POWER8E); + +typedef struct SPAPRCoreInfo { + const char *name; + void (*initfn)(Object *obj); +} SPAPRCoreInfo; + +static const SPAPRCoreInfo spapr_cores[] = { + /* POWER7 and aliases */ + { .name = "POWER7_v2.3", .initfn = spapr_cpu_core_POWER7_initfn }, + { .name = "POWER7", .initfn = spapr_cpu_core_POWER7_initfn }, + + /* POWER7+ and aliases */ + { .name = "POWER7+_v2.1", .initfn = spapr_cpu_core_POWER7plus_initfn }, + { .name = "POWER7+", .initfn = spapr_cpu_core_POWER7plus_initfn }, + + /* POWER8 and aliases */ + { .name = "POWER8_v2.0", .initfn = spapr_cpu_core_POWER8_initfn }, + { .name = "POWER8", .initfn = spapr_cpu_core_POWER8_initfn }, + { .name = "power8", .initfn = spapr_cpu_core_POWER8_initfn }, + + /* POWER8E and aliases */ + { .name = "POWER8E_v2.1", .initfn = spapr_cpu_core_POWER8E_initfn }, + { .name = "POWER8E", .initfn = spapr_cpu_core_POWER8E_initfn }, + + { .name = NULL } +}; + +static void spapr_cpu_core_register(const SPAPRCoreInfo *info) +{ + TypeInfo type_info = { + .parent = TYPE_SPAPR_CPU_CORE, + .instance_size = sizeof(sPAPRCPUCore), + .instance_init = info->initfn, + }; + + type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, info->name); + type_register(&type_info); + g_free((void *)type_info.name); +} + +static const TypeInfo spapr_cpu_core_type_info = { + .name = TYPE_SPAPR_CPU_CORE, + .parent = TYPE_CPU_CORE, + .abstract = true, + .instance_size = sizeof(sPAPRCPUCore), + .class_init = spapr_cpu_core_class_init, +}; + +static void spapr_cpu_core_register_types(void) +{ + const SPAPRCoreInfo *info = spapr_cores; + + type_register_static(&spapr_cpu_core_type_info); + while (info->name) { + spapr_cpu_core_register(info); + info++; + } +} + +type_init(spapr_cpu_core_register_types) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 815d5ee..bcd9de6 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -580,6 +580,7 @@ void spapr_hotplug_req_add_by_count(sPAPRDRConnectorType drc_type, uint32_t count); void spapr_hotplug_req_remove_by_count(sPAPRDRConnectorType drc_type, uint32_t count); +void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp); /* rtas-configure-connector state */ struct sPAPRConfigureConnectorState { diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h new file mode 100644 index 0000000..b6aa39e --- /dev/null +++ b/include/hw/ppc/spapr_cpu_core.h @@ -0,0 +1,28 @@ +/* + * sPAPR CPU core device. + * + * Copyright (C) 2016 Bharata B Rao + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ +#ifndef HW_SPAPR_CPU_CORE_H +#define HW_SPAPR_CPU_CORE_H + +#include "hw/qdev.h" +#include "hw/cpu/core.h" + +#define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" +#define SPAPR_CPU_CORE(obj) \ + OBJECT_CHECK(sPAPRCPUCore, (obj), TYPE_SPAPR_CPU_CORE) + +typedef struct sPAPRCPUCore { + /*< private >*/ + CPUCore parent_obj; + + /*< public >*/ + PowerPCCPU *threads; + ObjectClass *cpu; +} sPAPRCPUCore; + +#endif