From patchwork Thu May 19 14:43:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 9127755 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 00FA160221 for ; Thu, 19 May 2016 14:47:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E8A7127EE9 for ; Thu, 19 May 2016 14:47:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DD48B281CD; Thu, 19 May 2016 14:47:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7710B27EE9 for ; Thu, 19 May 2016 14:47:15 +0000 (UTC) Received: from localhost ([::1]:50752 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b3PEI-0006IB-JH for patchwork-qemu-devel@patchwork.kernel.org; Thu, 19 May 2016 10:47:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57416) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b3PBc-0004GG-LI for qemu-devel@nongnu.org; Thu, 19 May 2016 10:44:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b3PBW-0006A6-O8 for qemu-devel@nongnu.org; Thu, 19 May 2016 10:44:28 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39284) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b3PBW-0006A0-G0 for qemu-devel@nongnu.org; Thu, 19 May 2016 10:44:22 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 104B0486A1; Thu, 19 May 2016 14:44:22 +0000 (UTC) Received: from donizetti.redhat.com (ovpn-112-61.ams2.redhat.com [10.36.112.61]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u4JEhjCu025913; Thu, 19 May 2016 10:44:20 -0400 From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Thu, 19 May 2016 16:43:45 +0200 Message-Id: <1463669025-29685-3-git-send-email-pbonzini@redhat.com> In-Reply-To: <1463669025-29685-1-git-send-email-pbonzini@redhat.com> References: <1463669025-29685-1-git-send-email-pbonzini@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Thu, 19 May 2016 14:44:22 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL v4 22/52] target-xtensa: make cpu-qom.h not target specific X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Make XtensaCPU an opaque type within cpu-qom.h, and move all definitions of private methods, as well as all type definitions that require knowledge of the layout to cpu.h. Conversely, move all definitions needed to define a class to cpu-qom.h. This helps making files independent of NEED_CPU_H if they only need to pass around CPU pointers. Signed-off-by: Paolo Bonzini Signed-off-by: Max Filippov Signed-off-by: Paolo Bonzini --- target-xtensa/cpu-qom.h | 38 +++----------------------------------- target-xtensa/cpu.h | 41 ++++++++++++++++++++++++++++++++++++++--- 2 files changed, 41 insertions(+), 38 deletions(-) diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h index f5d9b9f..403bd95 100644 --- a/target-xtensa/cpu-qom.h +++ b/target-xtensa/cpu-qom.h @@ -40,6 +40,8 @@ #define XTENSA_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(XtensaCPUClass, (obj), TYPE_XTENSA_CPU) +typedef struct XtensaConfig XtensaConfig; + /** * XtensaCPUClass: * @parent_realize: The parent class' realize handler. @@ -59,40 +61,6 @@ typedef struct XtensaCPUClass { const XtensaConfig *config; } XtensaCPUClass; -/** - * XtensaCPU: - * @env: #CPUXtensaState - * - * An Xtensa CPU. - */ -typedef struct XtensaCPU { - /*< private >*/ - CPUState parent_obj; - /*< public >*/ - - CPUXtensaState env; -} XtensaCPU; - -static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env) -{ - return container_of(env, XtensaCPU, env); -} - -#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e)) - -#define ENV_OFFSET offsetof(XtensaCPU, env) - -void xtensa_cpu_do_interrupt(CPUState *cpu); -bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request); -void xtensa_cpu_do_unassigned_access(CPUState *cpu, hwaddr addr, - bool is_write, bool is_exec, int opaque, - unsigned size); -void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); -hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); -int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); -void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, - int is_write, int is_user, uintptr_t retaddr); +typedef struct XtensaCPU XtensaCPU; #endif diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 7bfc9c8..e47cb6b 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -34,6 +34,7 @@ #define CPUArchState struct CPUXtensaState #include "qemu-common.h" +#include "cpu-qom.h" #include "exec/cpu-defs.h" #include "fpu/softfloat.h" @@ -296,7 +297,7 @@ typedef struct XtensaGdbRegmap { XtensaGdbReg reg[1 + 16 + 64 + 256 + 256]; } XtensaGdbRegmap; -typedef struct XtensaConfig { +struct XtensaConfig { const char *name; uint64_t options; XtensaGdbRegmap gdb_regmap; @@ -329,7 +330,7 @@ typedef struct XtensaConfig { xtensa_tlb itlb; xtensa_tlb dtlb; -} XtensaConfig; +}; typedef struct XtensaConfigList { const XtensaConfig *config; @@ -379,7 +380,41 @@ typedef struct CPUXtensaState { CPU_COMMON } CPUXtensaState; -#include "cpu-qom.h" +/** + * XtensaCPU: + * @env: #CPUXtensaState + * + * An Xtensa CPU. + */ +struct XtensaCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUXtensaState env; +}; + +static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env) +{ + return container_of(env, XtensaCPU, env); +} + +#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e)) + +#define ENV_OFFSET offsetof(XtensaCPU, env) + +void xtensa_cpu_do_interrupt(CPUState *cpu); +bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request); +void xtensa_cpu_do_unassigned_access(CPUState *cpu, hwaddr addr, + bool is_write, bool is_exec, int opaque, + unsigned size); +void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); +hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, + int is_write, int is_user, uintptr_t retaddr); #define cpu_exec cpu_xtensa_exec #define cpu_signal_handler cpu_xtensa_signal_handler