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Thu, 02 Jun 2016 13:07:25 -0700 (PDT) Received: from a0999b0126e1.ant.amazon.com ([94.230.86.227]) by smtp.gmail.com with ESMTPSA id i4sm2127090wjj.49.2016.06.02.13.07.24 (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 02 Jun 2016 13:07:25 -0700 (PDT) From: Michael Rolnik X-Google-Original-From: Michael Rolnik To: qemu-devel@nongnu.org Date: Thu, 2 Jun 2016 23:07:02 +0300 Message-Id: <1464898022-97990-10-git-send-email-rolnik@amazon.com> X-Mailer: git-send-email 2.4.9 (Apple Git-60) In-Reply-To: <1464898022-97990-1-git-send-email-rolnik@amazon.com> References: <1464898022-97990-1-git-send-email-rolnik@amazon.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::241 Subject: [Qemu-devel] [PATCH 10/10] target-avr: fixing code style X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Rolnik , Michael Rolnik Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Michael Rolnik --- target-avr/cpu-qom.h | 38 +++++------------ target-avr/cpu.c | 100 +++++++++++++------------------------------- target-avr/cpu.h | 74 ++++++++------------------------ target-avr/gdbstub.c | 10 +---- target-avr/helper.c | 52 ++++++----------------- target-avr/translate-inst.c | 54 +++++++++++++++--------- target-avr/translate-inst.h | 20 +++++++++ target-avr/translate.c | 27 +++--------- target-avr/translate.h | 5 +-- 9 files changed, 134 insertions(+), 246 deletions(-) diff --git a/target-avr/cpu-qom.h b/target-avr/cpu-qom.h index 76ca908..bb0fbd7 100644 --- a/target-avr/cpu-qom.h +++ b/target-avr/cpu-qom.h @@ -25,9 +25,9 @@ #define TYPE_AVR_CPU "avr" -#define AVR_CPU_CLASS(klass) OBJECT_CLASS_CHECK(AVRCPUClass, (klass), TYPE_AVR_CPU) -#define AVR_CPU(obj) OBJECT_CHECK(AVRCPU, (obj), TYPE_AVR_CPU) -#define AVR_CPU_GET_CLASS(obj) OBJECT_GET_CLASS(AVRCPUClass, (obj), TYPE_AVR_CPU) +#define AVR_CPU_CLASS(klass) OBJECT_CLASS_CHECK(AVRCPUClass, (klass), TYPE_AVR_CPU) +#define AVR_CPU(obj) OBJECT_CHECK(AVRCPU, (obj), TYPE_AVR_CPU) +#define AVR_CPU_GET_CLASS(obj) OBJECT_GET_CLASS(AVRCPUClass, (obj), TYPE_AVR_CPU) /** * AVRCPUClass: @@ -58,40 +58,24 @@ typedef struct AVRCPU { CPUAVRState env; } AVRCPU; -static inline AVRCPU *avr_env_get_cpu(CPUAVRState *env) +static inline AVRCPU *avr_env_get_cpu(CPUAVRState *env) { return container_of(env, AVRCPU, env); } -#define ENV_GET_CPU(e) CPU(avr_env_get_cpu(e)) +#define ENV_GET_CPU(e) CPU(avr_env_get_cpu(e)) #define ENV_OFFSET offsetof(AVRCPU, env) #ifndef CONFIG_USER_ONLY extern const struct VMStateDescription vmstate_avr_cpu; #endif -void avr_cpu_do_interrupt( - CPUState *cpu); -bool avr_cpu_exec_interrupt( - CPUState *cpu, - int int_req); -void avr_cpu_dump_state( - CPUState *cs, - FILE *f, - fprintf_function cpu_fprintf, - int flags); +void avr_cpu_do_interrupt(CPUState *cpu); +bool avr_cpu_exec_interrupt(CPUState *cpu, int int_req); +void avr_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, int flags); -hwaddr avr_cpu_get_phys_page_debug( - CPUState *cpu, - vaddr addr); - -int avr_cpu_gdb_read_register( - CPUState *cpu, - uint8_t *buf, - int reg); -int avr_cpu_gdb_write_register( - CPUState *cpu, - uint8_t *buf, - int reg); +hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif diff --git a/target-avr/cpu.c b/target-avr/cpu.c index 9be0a1d..3c7fa07 100644 --- a/target-avr/cpu.c +++ b/target-avr/cpu.c @@ -25,17 +25,14 @@ #include "migration/vmstate.h" #include "machine.h" -static void avr_cpu_set_pc( - CPUState *cs, - vaddr value) +static void avr_cpu_set_pc(CPUState *cs, vaddr value) { AVRCPU *cpu = AVR_CPU(cs); cpu->env.pc = value / 2; /* internally PC points to words */ } -static bool avr_cpu_has_work( - CPUState *cs) +static bool avr_cpu_has_work(CPUState *cs) { AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env; @@ -45,9 +42,7 @@ static bool avr_cpu_has_work( | CPU_INTERRUPT_RESET)) && cpu_interrupts_enabled(env); } -static void avr_cpu_synchronize_from_tb( - CPUState *cs, - TranslationBlock *tb) +static void avr_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb) { AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env; @@ -55,8 +50,7 @@ static void avr_cpu_synchronize_from_tb( env->pc = tb->pc / 2; /* internally PC points to words */ } -static void avr_cpu_reset( - CPUState *s) +static void avr_cpu_reset(CPUState *s) { AVRCPU *cpu = AVR_CPU(s); AVRCPUClass *mcc = AVR_CPU_GET_CLASS(cpu); @@ -73,17 +67,13 @@ static void avr_cpu_reset( tlb_flush(s, 1); } -static void avr_cpu_disas_set_info( - CPUState *cpu, - disassemble_info *info) +static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { info->mach = bfd_arch_avr; info->print_insn = print_insn_avr; } -static void avr_cpu_realizefn( - DeviceState *dev, - Error **errp) +static void avr_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); AVRCPUClass *mcc = AVR_CPU_GET_CLASS(dev); @@ -94,10 +84,7 @@ static void avr_cpu_realizefn( mcc->parent_realize(dev, errp); } -static void avr_cpu_set_int( - void *opaque, - int irq, - int level) +static void avr_cpu_set_int(void *opaque, int irq, int level) { AVRCPU *cpu = opaque; CPUAVRState *env = &cpu->env; @@ -115,8 +102,7 @@ static void avr_cpu_set_int( } } -static void avr_cpu_initfn( - Object *obj) +static void avr_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); AVRCPU *cpu = AVR_CPU(obj); @@ -135,8 +121,7 @@ static void avr_cpu_initfn( } } -static ObjectClass *avr_cpu_class_by_name( - const char *cpu_model) +static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; char *typename; @@ -162,9 +147,7 @@ static ObjectClass *avr_cpu_class_by_name( return oc; } -static void avr_cpu_class_init( - ObjectClass *oc, - void *data) +static void avr_cpu_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); @@ -208,8 +191,7 @@ static void avr_cpu_class_init( = true; } -static void avr_avr1_initfn( - Object *obj) +static void avr_avr1_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -218,8 +200,7 @@ static void avr_avr1_initfn( avr_set_feature(env, AVR_FEATURE_2_BYTE_SP); avr_set_feature(env, AVR_FEATURE_2_BYTE_PC); } -static void avr_avr2_initfn( - Object *obj) +static void avr_avr2_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -234,8 +215,7 @@ static void avr_avr2_initfn( avr_set_feature(env, AVR_FEATURE_2_BYTE_SP); } -static void avr_avr25_initfn( - Object *obj) +static void avr_avr25_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -252,8 +232,7 @@ static void avr_avr25_initfn( avr_set_feature(env, AVR_FEATURE_MOVW); } -static void avr_avr3_initfn( - Object *obj) +static void avr_avr3_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -269,8 +248,7 @@ static void avr_avr3_initfn( avr_set_feature(env, AVR_FEATURE_JMP_CALL); } -static void avr_avr31_initfn( - Object *obj) +static void avr_avr31_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -288,8 +266,7 @@ static void avr_avr31_initfn( avr_set_feature(env, AVR_FEATURE_JMP_CALL); } -static void avr_avr35_initfn( - Object *obj) +static void avr_avr35_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -307,8 +284,7 @@ static void avr_avr35_initfn( avr_set_feature(env, AVR_FEATURE_MOVW); } -static void avr_avr4_initfn( - Object *obj) +static void avr_avr4_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -326,8 +302,7 @@ static void avr_avr4_initfn( avr_set_feature(env, AVR_FEATURE_MUL); } -static void avr_avr5_initfn( - Object *obj) +static void avr_avr5_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -346,8 +321,7 @@ static void avr_avr5_initfn( avr_set_feature(env, AVR_FEATURE_MUL); } -static void avr_avr51_initfn( - Object *obj) +static void avr_avr51_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -368,8 +342,7 @@ static void avr_avr51_initfn( avr_set_feature(env, AVR_FEATURE_MOVW); avr_set_feature(env, AVR_FEATURE_MUL); } -static void avr_avr6_initfn( - Object *obj) +static void avr_avr6_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -391,8 +364,7 @@ static void avr_avr6_initfn( avr_set_feature(env, AVR_FEATURE_MOVW); avr_set_feature(env, AVR_FEATURE_MUL); } -static void avr_xmega2_initfn( - Object *obj) +static void avr_xmega2_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -411,8 +383,7 @@ static void avr_xmega2_initfn( avr_set_feature(env, AVR_FEATURE_MUL); avr_set_feature(env, AVR_FEATURE_RMW); } -static void avr_xmega4_initfn( - Object *obj) +static void avr_xmega4_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -434,8 +405,7 @@ static void avr_xmega4_initfn( avr_set_feature(env, AVR_FEATURE_MUL); avr_set_feature(env, AVR_FEATURE_RMW); } -static void avr_xmega5_initfn( - Object *obj) +static void avr_xmega5_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -461,8 +431,7 @@ static void avr_xmega5_initfn( avr_set_feature(env, AVR_FEATURE_RMW); } -static void avr_xmega6_initfn( - Object *obj) +static void avr_xmega6_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -485,8 +454,7 @@ static void avr_xmega6_initfn( avr_set_feature(env, AVR_FEATURE_MUL); avr_set_feature(env, AVR_FEATURE_RMW); } -static void avr_xmega7_initfn( - Object *obj) +static void avr_xmega7_initfn(Object *obj) { AVRCPU *cpu = AVR_CPU(obj); CPUAVRState *env = &cpu->env; @@ -513,8 +481,7 @@ static void avr_xmega7_initfn( avr_set_feature(env, AVR_FEATURE_RMW); } -static void avr_any_initfn( - Object *obj) +static void avr_any_initfn(Object *obj) { /* Set cpu feature flags */ } @@ -543,9 +510,7 @@ static const AVRCPUInfo avr_cpus[] = { { .name = "any", .initfn = avr_any_initfn }, }; -static gint avr_cpu_list_compare( - gconstpointer a, - gconstpointer b) +static gint avr_cpu_list_compare(gconstpointer a, gconstpointer b) { ObjectClass *class_a = (ObjectClass *)a; ObjectClass *class_b = (ObjectClass *)b; @@ -563,9 +528,7 @@ static gint avr_cpu_list_compare( } } -static void avr_cpu_list_entry( - gpointer data, - gpointer user_data) +static void avr_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; CPUListState *s = user_data; @@ -578,9 +541,7 @@ static void avr_cpu_list_entry( g_free(name); } -void avr_cpu_list( - FILE *f, - fprintf_function cpu_fprintf) +void avr_cpu_list(FILE *f, fprintf_function cpu_fprintf) { CPUListState s = { .file = f, @@ -594,8 +555,7 @@ void avr_cpu_list( g_slist_foreach(list, avr_cpu_list_entry, &s); g_slist_free(list); } -AVRCPU *cpu_avr_init( - const char *cpu_model) +AVRCPU *cpu_avr_init(const char *cpu_model) { return AVR_CPU(cpu_generic_init(TYPE_AVR_CPU, cpu_model)); } diff --git a/target-avr/cpu.h b/target-avr/cpu.h index 2b67e89..e8985c9 100644 --- a/target-avr/cpu.h +++ b/target-avr/cpu.h @@ -41,7 +41,7 @@ #define DATA_INDEX 1 #define EXCP_RESET 1 -#define EXCP_INT(n) (EXCP_RESET + (n) + 1) +#define EXCP_INT(n) (EXCP_RESET + (n) + 1) #define PHYS_ADDR_MASK 0xfff00000 #define PHYS_CODE_BASE 0x00000000 @@ -117,25 +117,15 @@ struct CPUAVRState { CPU_COMMON }; -static inline int avr_feature( - CPUAVRState *env, - int feature) +static inline int avr_feature(CPUAVRState *env, int feature) { return (env->features & (1UL << feature)) != 0; } -static inline void avr_set_feature( - CPUAVRState *env, - int feature) +static inline void avr_set_feature(CPUAVRState *env, int feature) { env->features |= (1Ul << feature); } -static inline void avr_del_feature( - CPUAVRState *env, - int feature) -{ - env->features &= ~(1Ul << feature); -} #define cpu_list avr_cpu_list #define cpu_exec cpu_avr_exec @@ -144,64 +134,34 @@ static inline void avr_del_feature( #include "exec/cpu-all.h" #include "cpu-qom.h" -static inline int cpu_mmu_index( - CPUAVRState *env, - bool ifetch) +static inline int cpu_mmu_index(CPUAVRState *env, bool ifetch) { return 0; } -void avr_translate_init(void); - -AVRCPU *cpu_avr_init( - const char *cpu_model); - -#define cpu_init(cpu_model) CPU(cpu_avr_init(cpu_model)) - -void avr_cpu_list( - FILE *f, - fprintf_function cpu_fprintf); -int cpu_avr_exec( - CPUState *cpu); -int cpu_avr_signal_handler( - int host_signum, - void *pinfo, - void *puc); -int avr_cpu_handle_mmu_fault( - CPUState *cpu, - vaddr address, - int rw, - int mmu_idx); -int avr_cpu_memory_rw_debug( - CPUState *cs, - vaddr address, - uint8_t *buf, - int len, - bool is_write); +void avr_translate_init(void); + +AVRCPU *cpu_avr_init(const char *cpu_model); +#define cpu_init(cpu_model) CPU (cpu_avr_init(cpu_model)) + +void avr_cpu_list(FILE *f, fprintf_function cpu_fprintf); +int cpu_avr_exec(CPUState *cpu); +int cpu_avr_signal_handler(int host_signum, void *pinfo, void *puc); +int avr_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, int mmu_idx); +int avr_cpu_memory_rw_debug(CPUState *cs, vaddr address, uint8_t *buf, int len, bool is_write); #ifndef CONFIG_USER_ONLY -QEMU_NORETURN void avr_cpu_unassigned_access( - CPUState *cpu, - hwaddr addr, - bool is_write, - bool is_exec, - int unused, - unsigned size); +QEMU_NORETURN void avr_cpu_unassigned_access(CPUState *cpu, hwaddr addr, bool is_write, bool is_exec, int unused, unsigned size); #endif -static inline void cpu_get_tb_cpu_state( - CPUAVRState *env, - target_ulong *pc, - target_ulong *cs_base, - uint32_t *pflags) +static inline void cpu_get_tb_cpu_state(CPUAVRState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *pflags) { *pc = env->pc * 2; *cs_base = 0; *pflags = 0; } -static inline int cpu_interrupts_enabled( - CPUAVRState *env1) +static inline int cpu_interrupts_enabled(CPUAVRState *env1) { return env1->sregI != 0; } diff --git a/target-avr/gdbstub.c b/target-avr/gdbstub.c index 5923f49..85a9f0d 100644 --- a/target-avr/gdbstub.c +++ b/target-avr/gdbstub.c @@ -22,10 +22,7 @@ #include "qemu-common.h" #include "exec/gdbstub.h" -int avr_cpu_gdb_read_register( - CPUState *cs, - uint8_t *mem_buf, - int n) +int avr_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env; @@ -63,10 +60,7 @@ int avr_cpu_gdb_read_register( return 0; } -int avr_cpu_gdb_write_register( - CPUState *cs, - uint8_t *mem_buf, - int n) +int avr_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env; diff --git a/target-avr/helper.c b/target-avr/helper.c index 450f598..ec683b6 100644 --- a/target-avr/helper.c +++ b/target-avr/helper.c @@ -29,9 +29,7 @@ #include "qemu/host-utils.h" #include "exec/helper-proto.h" -bool avr_cpu_exec_interrupt( - CPUState *cs, - int interrupt_request) +bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { CPUClass *cc = CPU_GET_CLASS(cs); AVRCPU *cpu = AVR_CPU(cs); @@ -64,8 +62,7 @@ bool avr_cpu_exec_interrupt( return ret; } -void avr_cpu_do_interrupt( - CPUState *cs) +void avr_cpu_do_interrupt(CPUState *cs) { AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env; @@ -103,40 +100,24 @@ void avr_cpu_do_interrupt( cs->exception_index = -1; } -int avr_cpu_memory_rw_debug( - CPUState *cs, - vaddr addr, - uint8_t *buf, - int len, - bool is_write) +int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf, int len, bool is_write) { return cpu_memory_rw_debug(cs, addr, buf, len, is_write); } -hwaddr avr_cpu_get_phys_page_debug( - CPUState *cs, - vaddr addr) +hwaddr avr_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { return addr; /* I assume 1:1 address correspondance */ } -int avr_cpu_handle_mmu_fault( - CPUState *cs, - vaddr address, - int rw, - int mmu_idx) +int avr_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) { cs->exception_index = EXCP_DEBUG; cpu_dump_state(cs, stderr, fprintf, 0); return 1; } -void tlb_fill( - CPUState *cs, - target_ulong vaddr, - int is_write, - int mmu_idx, - uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong vaddr, int is_write, int mmu_idx, uintptr_t retaddr) { target_ulong page_size = TARGET_PAGE_SIZE; int prot = 0; @@ -155,16 +136,14 @@ void tlb_fill( tlb_set_page_with_attrs(cs, vaddr, paddr, attrs, prot, mmu_idx, page_size); } -void helper_sleep( - CPUAVRState *env) +void helper_sleep(CPUAVRState *env) { CPUState *cs = CPU(avr_env_get_cpu(env)); cs->exception_index = EXCP_HLT; cpu_loop_exit(cs); } -void helper_unsupported( - CPUAVRState *env) +void helper_unsupported(CPUAVRState *env) { CPUState *cs = CPU(avr_env_get_cpu(env)); @@ -173,8 +152,7 @@ void helper_unsupported( cpu_loop_exit(cs); } -void helper_debug( - CPUAVRState *env) +void helper_debug(CPUAVRState *env) { CPUState *cs = CPU(avr_env_get_cpu(env)); @@ -182,8 +160,7 @@ void helper_debug( cpu_loop_exit(cs); } -void helper_wdr( - CPUAVRState *env) +void helper_wdr(CPUAVRState *env) { CPUState *cs = CPU(avr_env_get_cpu(env)); @@ -191,9 +168,7 @@ void helper_wdr( cpu_loop_exit(cs); } -target_ulong helper_inb( - CPUAVRState *env, - uint32_t port) +target_ulong helper_inb(CPUAVRState *env, uint32_t port) { printf("in: io[%02x]\n", port); @@ -223,10 +198,7 @@ target_ulong helper_inb( return 0; } -void helper_outb( - CPUAVRState *env, - uint32_t port, - uint32_t data) +void helper_outb(CPUAVRState *env, uint32_t port, uint32_t data) { printf("out:%02x -> io[%02x]\n", data, port); diff --git a/target-avr/translate-inst.c b/target-avr/translate-inst.c index fe9d9fc..c9b28aa 100644 --- a/target-avr/translate-inst.c +++ b/target-avr/translate-inst.c @@ -36,8 +36,8 @@ void gen_add_Vf(TCGv R, TCGv Rd, TCGv Rr); void gen_sub_CHf(TCGv R, TCGv Rd, TCGv Rr); void gen_sub_Vf(TCGv R, TCGv Rd, TCGv Rr); void gen_ZNSf(TCGv R); -void gen_push_ret(CPUAVRState *env, int ret); -void gen_pop_ret(CPUAVRState *env, TCGv ret); +void gen_push_ret(CPUAVRState *env, int ret); +void gen_pop_ret(CPUAVRState *env, TCGv ret); void gen_jmp_ez(void); void gen_jmp_z(void); @@ -75,7 +75,7 @@ void gen_add_CHf(TCGv R, TCGv Rd, TCGv Rr) tcg_temp_free_i32(t1); } -void gen_add_Vf(TCGv R, TCGv Rd, TCGv Rr) +void gen_add_Vf(TCGv R, TCGv Rd, TCGv Rr) { TCGv t1 = tcg_temp_new_i32(); TCGv t2 = tcg_temp_new_i32(); @@ -97,7 +97,7 @@ void gen_add_Vf(TCGv R, TCGv Rd, TCGv Rr) tcg_temp_free_i32(t1); } -void gen_sub_CHf(TCGv R, TCGv Rd, TCGv Rr) +void gen_sub_CHf(TCGv R, TCGv Rd, TCGv Rr) { TCGv t1 = tcg_temp_new_i32(); TCGv t2 = tcg_temp_new_i32(); @@ -118,7 +118,7 @@ void gen_sub_CHf(TCGv R, TCGv Rd, TCGv Rr) tcg_temp_free_i32(t1); } -void gen_sub_Vf(TCGv R, TCGv Rd, TCGv Rr) +void gen_sub_Vf(TCGv R, TCGv Rd, TCGv Rr) { TCGv t1 = tcg_temp_new_i32(); TCGv t2 = tcg_temp_new_i32(); @@ -144,7 +144,7 @@ void gen_ZNSf(TCGv R) tcg_gen_and_tl(cpu_Sf, cpu_Nf, cpu_Vf);/* Sf = Nf & Vf */ } -void gen_push_ret(CPUAVRState *env, int ret) +void gen_push_ret(CPUAVRState *env, int ret) { tcg_gen_qemu_st8(tcg_const_local_i32((ret & 0x0000ff)), cpu_sp, DATA_INDEX); tcg_gen_subi_tl(cpu_sp, cpu_sp, 1); @@ -161,7 +161,7 @@ void gen_push_ret(CPUAVRState *env, int ret) } } -void gen_pop_ret(CPUAVRState *env, TCGv ret) +void gen_pop_ret(CPUAVRState *env, TCGv ret) { TCGv t0 = tcg_const_i32(0); TCGv t1 = tcg_const_i32(0); @@ -239,7 +239,7 @@ void gen_set_zaddr(TCGv addr) TCGv gen_get_addr(TCGv H, TCGv M, TCGv L) { - TCGv addr= tcg_temp_new_i32(); + TCGv addr = tcg_temp_new_i32(); tcg_gen_mov_tl(addr, H); /* addr = H:M:L */ tcg_gen_shli_tl(addr, addr, 8); @@ -466,15 +466,31 @@ int avr_translate_ASR(CPUAVRState *env, DisasContext *ctx, uint32_t opcode) */ int avr_translate_BCLR(CPUAVRState *env, DisasContext *ctx, uint32_t opcode) { - switch(BCLR_Bit(opcode)) { - case 0x00: tcg_gen_movi_tl(cpu_Cf, 0x00); break; - case 0x01: tcg_gen_movi_tl(cpu_Zf, 0x01); break; - case 0x02: tcg_gen_movi_tl(cpu_Nf, 0x00); break; - case 0x03: tcg_gen_movi_tl(cpu_Vf, 0x00); break; - case 0x04: tcg_gen_movi_tl(cpu_Sf, 0x00); break; - case 0x05: tcg_gen_movi_tl(cpu_Hf, 0x00); break; - case 0x06: tcg_gen_movi_tl(cpu_Tf, 0x00); break; - case 0x07: tcg_gen_movi_tl(cpu_If, 0x00); break; + switch (BCLR_Bit(opcode)) { + case 0x00: + tcg_gen_movi_tl(cpu_Cf, 0x00); + break; + case 0x01: + tcg_gen_movi_tl(cpu_Zf, 0x01); + break; + case 0x02: + tcg_gen_movi_tl(cpu_Nf, 0x00); + break; + case 0x03: + tcg_gen_movi_tl(cpu_Vf, 0x00); + break; + case 0x04: + tcg_gen_movi_tl(cpu_Sf, 0x00); + break; + case 0x05: + tcg_gen_movi_tl(cpu_Hf, 0x00); + break; + case 0x06: + tcg_gen_movi_tl(cpu_Tf, 0x00); + break; + case 0x07: + tcg_gen_movi_tl(cpu_If, 0x00); + break; } return BS_NONE; @@ -1269,7 +1285,7 @@ int avr_translate_LDX2(CPUAVRState *env, DisasContext *ctx, uint32_t opcode) tcg_gen_qemu_ld8u( Rd, addr, DATA_INDEX); tcg_gen_addi_tl(addr, addr, 1); /* addr = addr + 1 */ - + gen_set_xaddr(addr); tcg_temp_free_i32(addr); @@ -2257,7 +2273,7 @@ int avr_translate_STZ2(CPUAVRState *env, DisasContext *ctx, uint32_t opcode) tcg_gen_qemu_st8( Rd, addr, DATA_INDEX); tcg_gen_addi_tl(addr, addr, 1); /* addr = addr + 1 */ - + gen_set_zaddr(addr); tcg_temp_free_i32(addr); diff --git a/target-avr/translate-inst.h b/target-avr/translate-inst.h index 6bd180d..106f5f4 100644 --- a/target-avr/translate-inst.h +++ b/target-avr/translate-inst.h @@ -1,3 +1,23 @@ +/* + * QEMU AVR CPU + * + * Copyright (c) 2016 Michael Rolnik + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * + */ + #ifndef AVR_TRANSLATE_INST_H_ #define AVR_TRANSLATE_INST_H_ diff --git a/target-avr/translate.c b/target-avr/translate.c index 0df0184..5b0363a 100644 --- a/target-avr/translate.c +++ b/target-avr/translate.c @@ -47,7 +47,7 @@ TCGv cpu_sp; #include "exec/gen-icount.h" #define REG(x) (cpu_r[x]) -void avr_translate_init(void) +void avr_translate_init(void) { int i; static int done_init; @@ -91,10 +91,7 @@ void avr_translate_init(void) done_init = 1; } -static void decode_opc( - AVRCPU *cpu, - DisasContext *ctx, - InstInfo *inst) +static void decode_opc(AVRCPU *cpu, DisasContext *ctx, InstInfo *inst) { CPUAVRState *env = &cpu->env; @@ -118,19 +115,14 @@ static void decode_opc( } } -uint32_t get_opcode( - uint8_t const *code, - unsigned bitBase, - unsigned bitSize) +uint32_t get_opcode(uint8_t const *code, unsigned bitBase, unsigned bitSize) { return *(uint16_t *)code; } /*generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code( - CPUAVRState *env, - struct TranslationBlock *tb) +void gen_intermediate_code(CPUAVRState *env, struct TranslationBlock *tb) { AVRCPU *cpu = avr_env_get_cpu(env); CPUState *cs = CPU(cpu); @@ -231,19 +223,12 @@ done_generating: tb->icount = num_insns; } -void restore_state_to_opc( - CPUAVRState *env, - TranslationBlock *tb, - target_ulong *data) +void restore_state_to_opc(CPUAVRState *env, TranslationBlock *tb, target_ulong *data) { env->pc = data[0]; } -void avr_cpu_dump_state( - CPUState *cs, - FILE *f, - fprintf_function cpu_fprintf, - int flags) +void avr_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, int flags) { AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env; diff --git a/target-avr/translate.h b/target-avr/translate.h index fa65406..9062412 100644 --- a/target-avr/translate.h +++ b/target-avr/translate.h @@ -94,10 +94,7 @@ struct DisasContext { uint32_t avr_decode(uint32_t pc, uint32_t *length, uint32_t opcode, translate_function_t *translate); -static inline void gen_goto_tb(CPUAVRState *env, - DisasContext *ctx, - int n, - target_ulong dest) +static inline void gen_goto_tb(CPUAVRState *env, DisasContext *ctx, int n, target_ulong dest) { TranslationBlock *tb;