From patchwork Sat Jun 4 07:54:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 9154537 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A15BC60467 for ; Sat, 4 Jun 2016 07:57:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8608A2824A for ; Sat, 4 Jun 2016 07:57:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 78D902832D; Sat, 4 Jun 2016 07:57:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DE8FE2824A for ; Sat, 4 Jun 2016 07:57:19 +0000 (UTC) Received: from localhost ([::1]:59789 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b96SN-00054X-3N for patchwork-qemu-devel@patchwork.kernel.org; Sat, 04 Jun 2016 03:57:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41760) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b96Pa-0002Wy-Un for qemu-devel@nongnu.org; Sat, 04 Jun 2016 03:54:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b96PN-0005CO-Sr for qemu-devel@nongnu.org; Sat, 04 Jun 2016 03:54:26 -0400 Received: from mail-pa0-x241.google.com ([2607:f8b0:400e:c03::241]:35599) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b96PN-0005Bt-Ii for qemu-devel@nongnu.org; Sat, 04 Jun 2016 03:54:13 -0400 Received: by mail-pa0-x241.google.com with SMTP id gp3so7648012pac.2 for ; Sat, 04 Jun 2016 00:54:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=nnm3Seaddwpp1HPv8rtHkqoToi/nyKcfN4gH86e0OCg=; b=GjM/q5TN3Rm5Okkcfd2uW3FmM7WtI1rPHF/YzPxiZzYdks2AwTW19l5nHlc0xoj5SN tTcnhcZLIkXLsdL/Fq0WNhT+nkgpmfa5bDZtXk7ZgJ6l1GPMI8qQQRFa1EJa4XNcRteF Yo7oC1/GxkMtW/Wrz+qYMc2TehL9GUSqaSdtGQKs5CLHRBLcLnbm/lMVZQwv4CrYwhEg NZ8O6GQ8IRdhuq2NcIB2yVvwTp0tQMUV58tCnuIvQplWotnfv/E/+308CwVFipXWRhm7 gQFWzpcbpJw1e9DNRRbECWoNrzoAUmQgQ/B2Au1c/CsKeTh9v+7LbJV5sg/m1r6YziOx HTTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=nnm3Seaddwpp1HPv8rtHkqoToi/nyKcfN4gH86e0OCg=; b=Y4U+Wi4w3uqP4Yvx0ORF7Kk5Y1qCGGXYo/xRhEoP3L5lXFh5ae5D4ng2sniPPayogj PvGn8K3tYhP/R0OuqM4G7XR2ggJs7Xey18ixEt2cxFrGU3I0dTT0HicYjjAUBDWRny9/ yvJ+6rkpGgOWVRHBQRhnMRmpj4a02JcSdul7708GuhpnGiLGdwQPbA10eczaSM7yCwml c38hHHGt34TWWcLGulNIn70J/hgNOC5yed0cvucv4gjaDppPz596xf6MUFnqisPQ/vVN mawN7CkJM/iWPGgCTz/2jP0WEQdAAmni3yA8TmOrU0qaIKKAEQfNFuhvdI9qAt5BBTy6 pepw== X-Gm-Message-State: ALyK8tIWKQsGZF7H5RZKNe3hHvvZqGhOSc3P0nyJPa2bSZXcmueawU2H3/qeVaUWwQGXJA== X-Received: by 10.66.63.35 with SMTP id d3mr10271923pas.69.1465026850654; Sat, 04 Jun 2016 00:54:10 -0700 (PDT) Received: from bigtime.twiddle.net (71-37-54-227.tukw.qwest.net. [71.37.54.227]) by smtp.gmail.com with ESMTPSA id h5sm10837028pat.0.2016.06.04.00.54.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 04 Jun 2016 00:54:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 4 Jun 2016 00:54:07 -0700 Message-Id: <1465026847-6744-3-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1465026847-6744-1-git-send-email-rth@twiddle.net> References: <1465026847-6744-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c03::241 Subject: [Qemu-devel] [PATCH 2/2] tcg/i386: Use segment for 32-bit guest base on linux X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Richard Henderson This saves 3 bytes per memory operation. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 44 +++++++++++++++++++++++++++++++++++++------- 1 file changed, 37 insertions(+), 7 deletions(-) diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 11cbb3c..d8c2f6d 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -290,14 +290,13 @@ static inline int tcg_target_const_match(tcg_target_long val, TCGType type, # define P_REXW 0x1000 /* Set REX.W = 1 */ # define P_REXB_R 0x2000 /* REG field as byte register */ # define P_REXB_RM 0x4000 /* R/M field as byte register */ -# define P_GS 0x8000 /* gs segment override */ #else # define P_ADDR32 0 # define P_REXW 0 # define P_REXB_R 0 # define P_REXB_RM 0 -# define P_GS 0 #endif +#define P_SEG 0x8000 /* fs/gs segment override */ #define P_SIMDF3 0x10000 /* 0xf3 opcode prefix */ #define P_SIMDF2 0x20000 /* 0xf2 opcode prefix */ @@ -420,8 +419,8 @@ static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x) { int rex; - if (opc & P_GS) { - tcg_out8(s, 0x65); + if (opc & P_SEG) { + tcg_out8(s, 0x65); /* %gs */ } if (opc & P_DATA16) { /* We should never be asking for both 16 and 64-bit operation. */ @@ -462,6 +461,9 @@ static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x) #else static void tcg_out_opc(TCGContext *s, int opc) { + if (opc & P_SEG) { + tcg_out8(s, 0x64); /* %fs */ + } if (opc & P_DATA16) { tcg_out8(s, 0x66); } @@ -1461,7 +1463,7 @@ static void setup_guest_base(TCGContext *s) } # ifdef __linux__ if (arch_prctl(ARCH_SET_GS, guest_base) == 0) { - guest_base_flags = (TARGET_LONG_BITS == 32 ? P_GS | P_ADDR32 : P_GS); + guest_base_flags = P_SEG + (TARGET_LONG_BITS == 32) * P_ADDR32; return; } # endif @@ -1473,6 +1475,33 @@ static void setup_guest_base(TCGContext *s) tcg_out_movi(s, TCG_TYPE_PTR, guest_base_reg, guest_base); } } +#elif defined(__linux__) +# include +# include + +static int32_t guest_base_ofs; +static int guest_base_flags; +#define guest_base_reg -1 +static void setup_guest_base(TCGContext *s) +{ + if (guest_base != 0) { + struct user_desc desc = { + .entry_number = -1, + .base_addr = guest_base, + .limit = 0xfffff, + .seg_32bit = 1, + .limit_in_pages = 1, + .useable = 1, + }; + if (syscall(SYS_set_thread_area, &desc) == 0) { + int seg = desc.entry_number * 8 + 3; + asm volatile("movl %0,%%fs" : : "r"(seg)); + guest_base_flags = P_SEG; + return; + } + } + guest_base_ofs = guest_base; +} #else # define guest_base_flags 0 # define guest_base_reg -1 @@ -2310,6 +2339,9 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out_ld(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_ESP, (ARRAY_SIZE(tcg_target_callee_save_regs) + 1) * 4); tcg_out_addi(s, TCG_REG_ESP, -stack_addend); +# if !defined(CONFIG_SOFTMMU) + setup_guest_base(s); +# endif /* jmp *tb. */ tcg_out_modrm_offset(s, OPC_GRP5, EXT5_JMPN_Ev, TCG_REG_ESP, (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4 @@ -2317,11 +2349,9 @@ static void tcg_target_qemu_prologue(TCGContext *s) #else tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); tcg_out_addi(s, TCG_REG_ESP, -stack_addend); - # if !defined(CONFIG_SOFTMMU) setup_guest_base(s); # endif - /* jmp *tb. */ tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, tcg_target_call_iarg_regs[1]); #endif