From patchwork Mon Jun 6 14:47:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 9158537 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A8D3760572 for ; Mon, 6 Jun 2016 15:05:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9AFA725D91 for ; Mon, 6 Jun 2016 15:05:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8FE5026E5D; Mon, 6 Jun 2016 15:05:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1FD5625D91 for ; Mon, 6 Jun 2016 15:05:24 +0000 (UTC) Received: from localhost ([::1]:43011 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b9w5j-0006TE-8C for patchwork-qemu-devel@patchwork.kernel.org; Mon, 06 Jun 2016 11:05:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37917) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b9vou-00007h-Mh for qemu-devel@nongnu.org; Mon, 06 Jun 2016 10:48:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b9vor-0000VJ-Sw for qemu-devel@nongnu.org; Mon, 06 Jun 2016 10:47:59 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:57506) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b9vor-0000Sb-Gh for qemu-devel@nongnu.org; Mon, 06 Jun 2016 10:47:57 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1b9voh-0008Bs-IC for qemu-devel@nongnu.org; Mon, 06 Jun 2016 15:47:47 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 6 Jun 2016 15:47:20 +0100 Message-Id: <1465224465-21998-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465224465-21998-1-git-send-email-peter.maydell@linaro.org> References: <1465224465-21998-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 03/28] target-arm: Set IL bit in syndromes for insn abort, watchpoint, swstep X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP For some exception syndrome types, the IL bit should always be set. This includes the instruction abort, watchpoint and software step syndrome types; add the missing ARM_EL_IL bit to the syndrome values returned by syn_insn_abort(), syn_swstep() and syn_watchpoint(). Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Message-id: 1463487258-27468-2-git-send-email-peter.maydell@linaro.org --- target-arm/internals.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target-arm/internals.h b/target-arm/internals.h index a125873..728ecba 100644 --- a/target-arm/internals.h +++ b/target-arm/internals.h @@ -367,7 +367,7 @@ static inline uint32_t syn_fp_access_trap(int cv, int cond, bool is_16bit) static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc) { return (EC_INSNABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | (ea << 9) | (s1ptw << 7) | fsc; + | ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc; } static inline uint32_t syn_data_abort_no_iss(int same_el, @@ -396,13 +396,13 @@ static inline uint32_t syn_data_abort_with_iss(int same_el, static inline uint32_t syn_swstep(int same_el, int isv, int ex) { return (EC_SOFTWARESTEP << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | (isv << 24) | (ex << 6) | 0x22; + | ARM_EL_IL | (isv << 24) | (ex << 6) | 0x22; } static inline uint32_t syn_watchpoint(int same_el, int cm, int wnr) { return (EC_WATCHPOINT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | (cm << 8) | (wnr << 6) | 0x22; + | ARM_EL_IL | (cm << 8) | (wnr << 6) | 0x22; } static inline uint32_t syn_breakpoint(int same_el)