From patchwork Mon Jun 13 16:27:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?S09OUkFEIEZyw6lkw6lyaWM=?= X-Patchwork-Id: 9173549 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E94D66048C for ; Mon, 13 Jun 2016 16:28:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DB2F520410 for ; Mon, 13 Jun 2016 16:28:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CFD7225EF7; Mon, 13 Jun 2016 16:28:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, FSL_HELO_HOME, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4E8EC20410 for ; Mon, 13 Jun 2016 16:28:31 +0000 (UTC) Received: from localhost ([::1]:57659 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCUj0-0006U9-Bs for patchwork-qemu-devel@patchwork.kernel.org; Mon, 13 Jun 2016 12:28:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55858) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCUiS-0006RJ-4S for qemu-devel@nongnu.org; Mon, 13 Jun 2016 12:27:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bCUiN-0000uv-5p for qemu-devel@nongnu.org; Mon, 13 Jun 2016 12:27:56 -0400 Received: from greensocs.com ([193.104.36.180]:57868) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCUiM-0000sy-RX for qemu-devel@nongnu.org; Mon, 13 Jun 2016 12:27:51 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id 4525D1387704; Mon, 13 Jun 2016 18:27:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1465835270; bh=O0hIN3a7I2ZggfR8ctB89RvyN4HtzGqZuK9JBJvN1tk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=eJTu2GPa7JBoIZbOOgPe3fqYy2VyZKTcqtZ7B6Ky7DZem7+nRTrCHytI6+Wrbh+LM sTBHSDGjFujM2mcW8SpSu7cDy5qChw9YlZcHunZ1Ygi+XnngVNwAkn7d4PkrCAZBoy 1txAnjMFgNJ591OwlsDzvIIQkiZ0lCqoE5QT+Ts8= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=He0aabht; dkim=pass (1024-bit key) header.d=greensocs.com header.b=He0aabht Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id t8JsL4A-HEdR; Mon, 13 Jun 2016 18:27:49 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id F25E61387700; Mon, 13 Jun 2016 18:27:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1465835268; bh=O0hIN3a7I2ZggfR8ctB89RvyN4HtzGqZuK9JBJvN1tk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=He0aabhttWt3AKoXOnn+BHTtIaEnoqe7pJJuGhrL+yUWy5OgSThN67nNvqMlinCJ4 tzh10l1e+FkCjwaHCN9y+Zfb4jJYpGfc15DsvxM82qxNp/P/ksJeGycKtMcUX/viqP 9IcdBXxWY8cxoVDtEFfrK1kO9HnNIkDpfo5R6MJk= Received: from asus.home (localhost [IPv6:::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: fred.konrad@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id EC35DBBFC26; Mon, 13 Jun 2016 18:27:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1465835268; bh=O0hIN3a7I2ZggfR8ctB89RvyN4HtzGqZuK9JBJvN1tk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=He0aabhttWt3AKoXOnn+BHTtIaEnoqe7pJJuGhrL+yUWy5OgSThN67nNvqMlinCJ4 tzh10l1e+FkCjwaHCN9y+Zfb4jJYpGfc15DsvxM82qxNp/P/ksJeGycKtMcUX/viqP 9IcdBXxWY8cxoVDtEFfrK1kO9HnNIkDpfo5R6MJk= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Mon, 13 Jun 2016 18:27:33 +0200 Message-Id: <1465835259-21449-6-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1465835259-21449-1-git-send-email-fred.konrad@greensocs.com> References: <1465835259-21449-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC PATCH 05/11] docs: add qemu-clock documentation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, fred.konrad@greensocs.com, mark.burton@greensocs.com, alistair.francis@xilinx.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: KONRAD Frederic This adds the qemu-clock documentation. Signed-off-by: KONRAD Frederic --- docs/clock.txt | 112 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 docs/clock.txt diff --git a/docs/clock.txt b/docs/clock.txt new file mode 100644 index 0000000..f4ad4c8 --- /dev/null +++ b/docs/clock.txt @@ -0,0 +1,112 @@ + +What is a QEMU_CLOCK +==================== + +A QEMU_CLOCK is a QOM Object developed for the purpose of modeling a clock tree +with QEMU. + +It only simulates the clock by keeping a copy of the current frequency and +doesn't model the signal itself such as pin toggle or duty cycle. + +It allows to model the impact of badly configured PLL, clock source selection +or disabled clock on the models. + +Bounding the clock together to create a tree +============================================ + +In order to create a clock tree with QEMU_CLOCK two or more clock must be bound +together. Let's say there are two clocks clk_a and clk_b: +Using qemu_clk_bound(clk_a, clk_b) will bound clk_a and clk_b. + +Binding two qemu-clk together is a unidirectional link which means that changing +the rate of clk_a will propagate to clk_b and not the opposite. The bound +process automatically refresh clk_b rate. + +Clock can be bound and unbound during execution for modeling eg: a clock +selector. + +A clock can drive more than one other clock. eg with this code: +qemu_clk_bound(clk_a, clk_b); +qemu_clk_bound(clk_a, clk_c); + +A clock rate change one clk_a will propagate to clk_b and clk_c. + +Implementing a callback on a rate change +======================================== + +The function prototype is the following: +typedef float (*qemu_clk_rate_change_cb)(void *opaque, float rate); + +It's main goal is to modify the rate before it's passed to the next clocks in +the tree. + +eg: for a 4x PLL the function will be: +float qemu_clk_rate_change_cb(void *opaque, float rate) +{ + return 4.0 * rate; +} + +To set the callback for the clock: +void qemu_clk_set_callback(qemu_clk clk, qemu_clk_on_rate_update_cb cb, + void *opaque); +can be called. + +NOTE: It's not recommended that the clock is driven by more than one clock as it +would mean that we don't know which clock trigger the callback. + +The rate update process +======================= + +The rate update happen in this way: +When a model wants to update a clock frequency (eg: based on a register change +or something similar) it will call qemu_clk_update_rate(..) on the clock: + * The callback associated to the clock is called with the new rate. + * qemu_clk_update_rate(..) is then called on all bound clock with the + value returned by the callback. + +NOTE: When no callback is attached the clock qemu_clk_update_rate(..) is called +with the unmodified rate. + +Attaching a QEMU_CLOCK to a DeviceState +======================================= + +Attaching a qemu-clk to a DeviceState is required to be able to get the clock +outside the model through qemu_clk_get_pin(..). + +It is also required to be able to print the clock and its rate with info qtree. +For example: + + type System + dev: xlnx.zynqmp_crf, id "" + gpio-out "sysbus-irq" 1 + gpio-out "RST_A9" 4 + qemu-clk "dbg_trace" 0.0 + qemu-clk "vpll_to_lpd" 625000000.0 + qemu-clk "dp_stc_ref" 0.0 + qemu-clk "dpll_to_lpd" 12500000.0 + qemu-clk "acpu_clk" 0.0 + qemu-clk "pcie_ref" 0.0 + qemu-clk "topsw_main" 0.0 + qemu-clk "topsw_lsbus" 0.0 + qemu-clk "dp_audio_ref" 0.0 + qemu-clk "sata_ref" 0.0 + qemu-clk "dp_video_ref" 71428568.0 + qemu-clk "vpll_clk" 2500000000.0 + qemu-clk "apll_to_lpd" 12500000.0 + qemu-clk "dpll_clk" 50000000.0 + qemu-clk "gpu_ref" 0.0 + qemu-clk "aux_refclk" 0.0 + qemu-clk "video_clk" 27000000.0 + qemu-clk "gdma_ref" 0.0 + qemu-clk "gt_crx_ref_clk" 0.0 + qemu-clk "dbg_fdp" 0.0 + qemu-clk "apll_clk" 50000000.0 + qemu-clk "pss_alt_ref_clk" 0.0 + qemu-clk "ddr" 0.0 + qemu-clk "pss_ref_clk" 50000000.0 + qemu-clk "dpdma_ref" 0.0 + qemu-clk "dbg_tstmp" 0.0 + mmio 00000000fd1a0000/000000000000010c + +This way a DeviceState can have multiple clock input or output. +