From patchwork Tue Jun 14 05:54:44 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 9175023 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 43B0C6048C for ; Tue, 14 Jun 2016 06:00:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 34AD9280E0 for ; Tue, 14 Jun 2016 06:00:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2898B2821D; Tue, 14 Jun 2016 06:00:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AAC6D280E0 for ; Tue, 14 Jun 2016 06:00:11 +0000 (UTC) Received: from localhost ([::1]:32809 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bChOU-00044Y-R2 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 14 Jun 2016 02:00:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34820) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bChJW-0007hK-MS for qemu-devel@nongnu.org; Tue, 14 Jun 2016 01:55:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bChJQ-0004Ob-Cc for qemu-devel@nongnu.org; Tue, 14 Jun 2016 01:55:01 -0400 Received: from ozlabs.org ([103.22.144.67]:43109) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bChJQ-0004O8-1A; Tue, 14 Jun 2016 01:54:56 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3rTJkz2r0Lz9t0q; Tue, 14 Jun 2016 15:54:51 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1465883691; bh=kghJJfvwmusxWUVVoSMA7rU9Cq7RV2g8LS6INRSsPmg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DJvF2P3bxNrvvghkgUnmXhrVby5OXn2TChVmTYYZ04xyc376ajvFM0wE6llC113yc xrfdpcoH6CewDN0PHYh8VmQOTtp+ROxQ2fqIvU8TuocvtynXPuRJCPMhjCgPPHNSE5 jZPQj5Usd6J6UaeY+Ixtv8zpbfE00OzNyL4byNcs= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 14 Jun 2016 15:54:44 +1000 Message-Id: <1465883690-8445-3-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1465883690-8445-1-git-send-email-david@gibson.dropbear.id.au> References: <1465883690-8445-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 2/8] ppc: Split pcr_mask settings into supported bits and the register mask X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , David Gibson , qemu-ppc@nongnu.org, agraf@suse.de, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Thomas Huth The current pcr_mask values are ambiguous: Should these be the mask that defines valid bits in the PCR register? Or should these rather indicate which compatibility levels are possible? Anyway, POWER6 and POWER7 should certainly not use the same values here. So let's introduce an additional variable "pcr_supported" here which is used to indicate the valid compatibility levels, and use pcr_mask to signal the valid bits in the PCR register. Signed-off-by: Thomas Huth Signed-off-by: David Gibson --- hw/ppc/spapr_hcall.c | 4 ++-- target-ppc/cpu-qom.h | 3 ++- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 6 ++++-- 4 files changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index bb8f4de..cc16249 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -934,9 +934,9 @@ static void cas_handle_compat_cpu(PowerPCCPUClass *pcc, uint32_t pvr, } /* If it is a logical PVR, try to determine the highest level */ - is205 = (pcc->pcr_mask & PCR_COMPAT_2_05) && + is205 = (pcc->pcr_supported & PCR_COMPAT_2_05) && (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_05)); - is206 = (pcc->pcr_mask & PCR_COMPAT_2_06) && + is206 = (pcc->pcr_supported & PCR_COMPAT_2_06) && ((lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06)) || (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06_PLUS))); diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index 07358aa..969ecdf 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -165,7 +165,8 @@ typedef struct PowerPCCPUClass { uint32_t pvr; bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr); - uint64_t pcr_mask; + uint64_t pcr_mask; /* Available bits in PCR register */ + uint64_t pcr_supported; /* Bits for supported PowerISA versions */ uint32_t svr; uint64_t insns_flags; uint64_t insns_flags2; diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index cb8b912..9087a08 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -2200,6 +2200,7 @@ enum { enum { PCR_COMPAT_2_05 = 1ull << (63-62), PCR_COMPAT_2_06 = 1ull << (63-61), + PCR_COMPAT_2_07 = 1ull << (63-60), PCR_VEC_DIS = 1ull << (63-0), /* Vec. disable (bit NA since POWER8) */ PCR_VSX_DIS = 1ull << (63-1), /* VSX disable (bit NA since POWER8) */ PCR_TM_DIS = 1ull << (63-2), /* Trans. memory disable (POWER8) */ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index a1db500..fa09183 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8365,7 +8365,8 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) dc->desc = "POWER7"; dc->props = powerpc_servercpu_properties; pcc->pvr_match = ppc_pvr_match_power7; - pcc->pcr_mask = PCR_COMPAT_2_05 | PCR_COMPAT_2_06; + pcc->pcr_mask = PCR_VEC_DIS | PCR_VSX_DIS | PCR_COMPAT_2_05; + pcc->pcr_supported = PCR_COMPAT_2_06 | PCR_COMPAT_2_05; pcc->init_proc = init_proc_POWER7; pcc->check_pow = check_pow_nocheck; pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB | @@ -8445,7 +8446,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) dc->desc = "POWER8"; dc->props = powerpc_servercpu_properties; pcc->pvr_match = ppc_pvr_match_power8; - pcc->pcr_mask = PCR_COMPAT_2_05 | PCR_COMPAT_2_06; + pcc->pcr_mask = PCR_TM_DIS | PCR_COMPAT_2_06 | PCR_COMPAT_2_05; + pcc->pcr_supported = PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_COMPAT_2_05; pcc->init_proc = init_proc_POWER8; pcc->check_pow = check_pow_nocheck; pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |