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Ip=[131.228.2.241]; Helo=[mailrelay.int.nokia.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0701MB1900 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 X-Received-From: 157.56.112.131 Subject: [Qemu-devel] [PATCH v2 03/10] m25p80: Allow more than four banks. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, crosthwaitepeter@gmail.com, clg@fr.ibm.com, clg@kaod.org, pawel.lenkow@itlen.com, rfsw-patches@mlist.emea.nsn-intra.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Marcin Krzeminski Allow to have more than four 16MiB regions for bigger flash devices. Signed-off-by: Marcin Krzeminski Reviewed-by: Cédric Le Goater --- hw/block/m25p80.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index 342f7c9..6910c52 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -129,7 +129,6 @@ typedef struct FlashPartInfo { #define EVCFG_QUAD_IO_ENABLED (1 << 7) #define NVCFG_4BYTE_ADDR_MASK (1 << 0) #define NVCFG_LOWER_SEGMENT_MASK (1 << 1) -#define CFG_UPPER_128MB_SEG_ENABLED 0x3 /* Numonyx (Micron) Flag Status Register macros */ #define FSR_4BYTE_ADDR_MODE_ENABLED 0x1 @@ -545,7 +544,7 @@ static void complete_collecting_data(Flash *s) } if (get_addr_length(s) == 3) { - s->cur_addr += (s->ear & 0x3) * MAX_3BYTES_SIZE; + s->cur_addr += s->ear * MAX_3BYTES_SIZE; } s->state = STATE_IDLE; @@ -644,7 +643,7 @@ static void reset_memory(Flash *s) s->four_bytes_address_mode = true; } if (!(s->nonvolatile_cfg & NVCFG_LOWER_SEGMENT_MASK)) { - s->ear = CFG_UPPER_128MB_SEG_ENABLED; + s->ear = s->size / MAX_3BYTES_SIZE - 1; } break; default: