| Message ID | 1466169069-29375-12-git-send-email-real@ispras.ru (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 17/06/2016 15:11, Efimov Vasily wrote: > The isa_bus_irqs function initializes ISA bus IRQ array pointer with specified > value. > > Previously the ICH9 LPC bridge model did not have its own IRQs but > only IRQ pointer cache. And same GSI were used for ISA bus and other sources > behind the bridge (PCI, SCI). Hence, the pc_q35_init was only possible place to > setup both ISA bus IRQs and the bridge IRQ cache. > > As a result, the call of isa_bus_irqs was made from pc_q35_init. > > Now the ICH9 LPC bridge has its own output IRQs which are connected to GSI. The > output IRQs are already used to route IRQs from PCI and SCI. > > The patch makes the ICH9 LPC bridge output IRQs to used for ISA bus too. > > Signed-off-by: Efimov Vasily <real@ispras.ru> > --- > hw/i386/pc_q35.c | 3 --- > hw/isa/lpc_ich9.c | 2 ++ > 2 files changed, 2 insertions(+), 3 deletions(-) > > diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c > index a1fad2b..4661be2 100644 > --- a/hw/i386/pc_q35.c > +++ b/hw/i386/pc_q35.c > @@ -200,9 +200,6 @@ static void pc_q35_init(MachineState *machine) > pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq); > isa_bus = ich9_lpc->isa_bus; > > - /*end early*/ > - isa_bus_irqs(isa_bus, gsi); > - > if (kvm_pic_in_kernel()) { > i8259 = kvm_i8259_init(isa_bus); > } else if (xen_enabled()) { > diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c > index 1e8e0e4..798d9e7 100644 > --- a/hw/isa/lpc_ich9.c > +++ b/hw/isa/lpc_ich9.c > @@ -639,6 +639,8 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp) > > qdev_init_gpio_out(dev, lpc->pic, ISA_NUM_IRQS); > qdev_init_gpio_out(dev, lpc->ioapic, IOAPIC_NUM_PINS); > + > + isa_bus_irqs(isa_bus, lpc->pic); The modeling here was weird. ICH9 does not need both ->pic and ->ioapic, it can make do with just a 24-entry GSI array. If you change that in the previous patch, this one makes much more sense. As it is now, it seems like the ISA bus will not deliver interrupts to the IOAPIC, and that makes no sense. Thanks, Paolo > } > > static bool ich9_rst_cnt_needed(void *opaque) >
On 17/06/2016 16:03, Paolo Bonzini wrote: > The modeling here was weird. ICH9 does not need both ->pic and > ->ioapic, it can make do with just a 24-entry GSI array. > > If you change that in the previous patch, this one makes much more > sense. As it is now, it seems like the ISA bus will not deliver > interrupts to the IOAPIC, and that makes no sense. I've sent a patch series for you to rebase patch 10 and 11 on. Let me know what you think! Paolo
20.06.2016 17:40, Paolo Bonzini wrote: > > I've sent a patch series for you to rebase patch 10 and 11 on. Let me > know what you think! I see no problems with the patch series. In second version, I'll create named GPIO ("gsi") for the new IRQ vector gsi (patch 10). The vector will be used to set up ISA bus IRQs with isa_bus_irqs (patch 11). > > Paolo > Vasily
On 21/06/2016 15:46, Ефимов Василий wrote: >> I've sent a patch series for you to rebase patch 10 and 11 on. Let me >> know what you think! > I see no problems with the patch series. In second version, I'll create > named GPIO ("gsi") for the new IRQ vector gsi (patch 10). The vector > will be used to set up ISA bus IRQs with isa_bus_irqs (patch 11). Thanks, it would be nice if you could reply to the patches with "Reviewed-by". Thanks, Paolo
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index a1fad2b..4661be2 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -200,9 +200,6 @@ static void pc_q35_init(MachineState *machine) pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq); isa_bus = ich9_lpc->isa_bus; - /*end early*/ - isa_bus_irqs(isa_bus, gsi); - if (kvm_pic_in_kernel()) { i8259 = kvm_i8259_init(isa_bus); } else if (xen_enabled()) { diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 1e8e0e4..798d9e7 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -639,6 +639,8 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp) qdev_init_gpio_out(dev, lpc->pic, ISA_NUM_IRQS); qdev_init_gpio_out(dev, lpc->ioapic, IOAPIC_NUM_PINS); + + isa_bus_irqs(isa_bus, lpc->pic); } static bool ich9_rst_cnt_needed(void *opaque)
The isa_bus_irqs function initializes ISA bus IRQ array pointer with specified value. Previously the ICH9 LPC bridge model did not have its own IRQs but only IRQ pointer cache. And same GSI were used for ISA bus and other sources behind the bridge (PCI, SCI). Hence, the pc_q35_init was only possible place to setup both ISA bus IRQs and the bridge IRQ cache. As a result, the call of isa_bus_irqs was made from pc_q35_init. Now the ICH9 LPC bridge has its own output IRQs which are connected to GSI. The output IRQs are already used to route IRQs from PCI and SCI. The patch makes the ICH9 LPC bridge output IRQs to used for ISA bus too. Signed-off-by: Efimov Vasily <real@ispras.ru> --- hw/i386/pc_q35.c | 3 --- hw/isa/lpc_ich9.c | 2 ++ 2 files changed, 2 insertions(+), 3 deletions(-)