diff mbox

[08/13] port92: handle A20 IRQ as GPIO

Message ID 1466169069-29375-9-git-send-email-real@ispras.ru (mailing list archive)
State New, archived
Headers show

Commit Message

Efimov Vasily June 17, 2016, 1:11 p.m. UTC
The port92 device has outgouing IRQ line A20. Currently the IRQ is referenced
by a pointer which normally is set during machine initialization. The
pointer is never changed at runtime. Hence, common GPIO model can be applied
to A20 IRQ line. Note that checking for IRQ to be connected as in
previous version of code is not required qemu_set_irq will do it.

Signed-off-by: Efimov Vasily <real@ispras.ru>
---
 hw/i386/pc.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Paolo Bonzini June 17, 2016, 1:24 p.m. UTC | #1
On 17/06/2016 15:11, Efimov Vasily wrote:
> The port92 device has outgouing IRQ line A20. Currently the IRQ is referenced
> by a pointer which normally is set during machine initialization. The
> pointer is never changed at runtime. Hence, common GPIO model can be applied
> to A20 IRQ line. Note that checking for IRQ to be connected as in
> previous version of code is not required qemu_set_irq will do it.
> 
> Signed-off-by: Efimov Vasily <real@ispras.ru>
> ---
>  hw/i386/pc.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 7198ed5..e8b92ea 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -505,7 +505,7 @@ typedef struct Port92State {
>  
>      MemoryRegion io;
>      uint8_t outport;
> -    qemu_irq *a20_out;
> +    qemu_irq a20_out;
>  } Port92State;
>  
>  static void port92_write(void *opaque, hwaddr addr, uint64_t val,
> @@ -516,7 +516,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
>  
>      DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
>      s->outport = val;
> -    qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> +    qemu_set_irq(s->a20_out, (val >> 1) & 1);
>      if ((val & 1) && !(oldval & 1)) {
>          qemu_system_reset_request();
>      }
> @@ -535,9 +535,7 @@ static uint64_t port92_read(void *opaque, hwaddr addr,
>  
>  static void port92_init(ISADevice *dev, qemu_irq *a20_out)
>  {
> -    Port92State *s = PORT92(dev);
> -
> -    s->a20_out = a20_out;
> +    qdev_connect_gpio_out(DEVICE(dev), 0, *a20_out);
>  }
>  
>  static const VMStateDescription vmstate_port92_isa = {
> @@ -574,6 +572,8 @@ static void port92_initfn(Object *obj)
>      memory_region_init_io(&s->io, OBJECT(s), &port92_ops, s, "port92", 1);
>  
>      s->outport = 0;
> +
> +    qdev_init_gpio_out(DEVICE(obj), &s->a20_out, 1);
>  }
>  
>  static void port92_realizefn(DeviceState *dev, Error **errp)
> 

Same as previous patch---please use named GPIOs.

Paolo
diff mbox

Patch

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7198ed5..e8b92ea 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -505,7 +505,7 @@  typedef struct Port92State {
 
     MemoryRegion io;
     uint8_t outport;
-    qemu_irq *a20_out;
+    qemu_irq a20_out;
 } Port92State;
 
 static void port92_write(void *opaque, hwaddr addr, uint64_t val,
@@ -516,7 +516,7 @@  static void port92_write(void *opaque, hwaddr addr, uint64_t val,
 
     DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
     s->outport = val;
-    qemu_set_irq(*s->a20_out, (val >> 1) & 1);
+    qemu_set_irq(s->a20_out, (val >> 1) & 1);
     if ((val & 1) && !(oldval & 1)) {
         qemu_system_reset_request();
     }
@@ -535,9 +535,7 @@  static uint64_t port92_read(void *opaque, hwaddr addr,
 
 static void port92_init(ISADevice *dev, qemu_irq *a20_out)
 {
-    Port92State *s = PORT92(dev);
-
-    s->a20_out = a20_out;
+    qdev_connect_gpio_out(DEVICE(dev), 0, *a20_out);
 }
 
 static const VMStateDescription vmstate_port92_isa = {
@@ -574,6 +572,8 @@  static void port92_initfn(Object *obj)
     memory_region_init_io(&s->io, OBJECT(s), &port92_ops, s, "port92", 1);
 
     s->outport = 0;
+
+    qdev_init_gpio_out(DEVICE(obj), &s->a20_out, 1);
 }
 
 static void port92_realizefn(DeviceState *dev, Error **errp)