From patchwork Tue Jun 21 07:47:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Xu X-Patchwork-Id: 9189707 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7D12260756 for ; Tue, 21 Jun 2016 07:53:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6BDCD27FA7 for ; Tue, 21 Jun 2016 07:53:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5F41F27FAC; Tue, 21 Jun 2016 07:53:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0A6A527FA7 for ; Tue, 21 Jun 2016 07:53:09 +0000 (UTC) Received: from localhost ([::1]:49479 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFGUe-0007BZ-UI for patchwork-qemu-devel@patchwork.kernel.org; Tue, 21 Jun 2016 03:53:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60764) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFGQN-0003lB-F6 for qemu-devel@nongnu.org; Tue, 21 Jun 2016 03:48:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bFGQL-0003Lt-Do for qemu-devel@nongnu.org; Tue, 21 Jun 2016 03:48:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46041) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFGQL-0003Lp-7z for qemu-devel@nongnu.org; Tue, 21 Jun 2016 03:48:41 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C2CB7C05B1CA; Tue, 21 Jun 2016 07:48:40 +0000 (UTC) Received: from pxdev.xzpeter.org (vpn1-6-130.pek2.redhat.com [10.72.6.130]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u5L7luxF018693; Tue, 21 Jun 2016 03:48:34 -0400 From: Peter Xu To: qemu-devel@nongnu.org Date: Tue, 21 Jun 2016 15:47:35 +0800 Message-Id: <1466495274-5011-8-git-send-email-peterx@redhat.com> In-Reply-To: <1466495274-5011-1-git-send-email-peterx@redhat.com> References: <1466495274-5011-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Tue, 21 Jun 2016 07:48:40 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v10 07/26] intel_iommu: set IR bit for ECAP register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, mst@redhat.com, jasowang@redhat.com, rkrcmar@redhat.com, peterx@redhat.com, alex.williamson@redhat.com, jan.kiszka@web.de, wexu@redhat.com, pbonzini@redhat.com, marcel@redhat.com, imammedo@redhat.com, davidkiarie4@gmail.com, rth@twiddle.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Enable IR in IOMMU Extended Capability register. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 6 ++++++ hw/i386/intel_iommu_internal.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index b170f97..e216fd3 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1948,6 +1948,8 @@ static AddressSpace *vtd_find_add_as(X86IOMMUState *x86_iommu, PCIBus *bus, */ static void vtd_init(IntelIOMMUState *s) { + X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s); + memset(s->csr, 0, DMAR_REG_SIZE); memset(s->wmask, 0, DMAR_REG_SIZE); memset(s->w1cmask, 0, DMAR_REG_SIZE); @@ -1968,6 +1970,10 @@ static void vtd_init(IntelIOMMUState *s) VTD_CAP_SAGAW | VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SLLPS; s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO; + if (x86_iommu->intr_supported) { + s->ecap |= VTD_ECAP_IR; + } + vtd_reset_context_cache(s); vtd_reset_iotlb(s); diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index b648e69..5b98a11 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -176,6 +176,8 @@ /* (offset >> 4) << 8 */ #define VTD_ECAP_IRO (DMAR_IOTLB_REG_OFFSET << 4) #define VTD_ECAP_QI (1ULL << 1) +/* Interrupt Remapping support */ +#define VTD_ECAP_IR (1ULL << 3) /* CAP_REG */ /* (offset >> 4) << 24 */